Principal IC Design Engineer — CMOS/ROIC, Hybrid

Leonardo

Southampton

Hybrid

GBP 90,000 - 120,000

Full time

14 days+

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Job summary

Leonardo in Southampton seeks a Principal Integrated Circuit (IC) Design Engineer to help design and manufacture infrared imaging products for remote sensing and thermal imaging. You will work in a mixed-signal IC team at transistor, cell and block levels to translate requirements into verifiable solutions.

The role offers hybrid working with flexibility, and opportunities to lead junior engineers and contribute to full ROIC design flows and verification across the project lifecycle.

Qualifications

  • Proven experience as an Integrated Circuit (IC) Design Engineer working with CMOS ICs or Readout ICs.
  • Strong analogue, mixed signal and/or Digital IC design skills based on formal qualifications and experience gained from working on complex IC designs.
  • Experience in transistor/block level layout design.
  • Block level designing and schematic capture from scratch with simulation of final architecture.
  • Cadence IC design tool suite experience.
  • Ability to work in a multi-disciplinary team.
  • Experience leading more junior members of the team.

Responsibilities

  • Working to design specifications.
  • Completing mixed signal design and development tasks.
  • Generating and executing rigorous design verification tasks.
  • Generating and capturing verification evidence.
  • Working to design processes and procedures.
  • Completing design validation from manufactured samples.
  • Preparing technical documentation and reports.

Skills

Analog IC design
Mixed-signal design
Digital IC design
Transistor/block layout design
Schematic capture
Simulation
Team leadership

Education

Degree in Electrical Engineering

Tools

Cadence

Job description

Leonardo in Southampton seeks a Principal Integrated Circuit (IC) Design Engineer to help design and manufacture infrared imaging products for remote sensing and thermal imaging. You will work in a mixed-signal IC team at transistor, cell and block levels to translate requirements into verifiable solutions.

The role offers hybrid working with flexibility, and opportunities to lead junior engineers and contribute to full ROIC design flows and verification across the project lifecycle.

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