Hybrid Digital Verification Engineer – OpenTitan & RISC-V

microTECH Global LTD; Cambridge; Hybrid; GBP 55,000 - 75,000; Full time

Benefits offered by this job

Global partners

Career development

Collaborative team

Job summary

microTECH Global LTD in Cambridge, UK is seeking a Digital Verification Engineer with 1–5 years of industry experience to join an open-source silicon team. This permanent, hybrid role offers involvement in OpenTitan Root of Trust and Ibex CPU verification.

You will develop and debug SystemVerilog/UVM testbenches, create verification plans, and collaborate with design engineers to deliver high-quality silicon, while contributing to open-source projects and robust verification environments.

Qualifications

• 1–5 years' industry experience in Digital Design Verification.
• Experience with SystemVerilog and UVM.
• Understanding of verification methodologies and constrained-random verification.
• Experience writing testbenches and debugging RTL.
• Programming in Python and/or C.
• Familiarity with Git or other version control systems.
• Exposure to RISC-V or CPU verification.
• Knowledge of formal verification.
• Experience with scripting and verification automation.
• Interest in open-source hardware and silicon development.

Responsibilities

• Develop and debug SystemVerilog/UVM testbenches.
• Create and execute verification plans, tests, and coverage.
• Debug simulation failures and support regression testing.
• Contribute to verification infrastructure and automation.
• Collaborate closely with design engineers to ensure high-quality silicon.
• Participate in code reviews and contribute to open-source projects.

Skills

SystemVerilog

UVM

Constrained-random

Testbenches

Python

C language

Git

RISC-V

Formal verification

Open-source hardware

Job description

microTECH Global LTD in Cambridge, UK is seeking a Digital Verification Engineer with 1–5 years of industry experience to join an open-source silicon team. This permanent, hybrid role offers involvement in OpenTitan Root of Trust and Ibex CPU verification.

You will develop and debug SystemVerilog/UVM testbenches, create verification plans, and collaborate with design engineers to deliver high-quality silicon, while contributing to open-source projects and robust verification environments.