Digital Verification Engineer

microTECH Global LTD; Cambridge; Hybrid; GBP 55,000 - 75,000; Full time

Benefits offered by this job

Global partners

Career development

Collaborative team

Job summary

microTECH Global LTD in Cambridge, UK is seeking a Digital Verification Engineer with 1–5 years of industry experience to join an open-source silicon team. This permanent, hybrid role offers involvement in OpenTitan Root of Trust and Ibex CPU verification.

You will develop and debug SystemVerilog/UVM testbenches, create verification plans, and collaborate with design engineers to deliver high-quality silicon, while contributing to open-source projects and robust verification environments.

Qualifications

• 1–5 years' industry experience in Digital Design Verification.
• Experience with SystemVerilog and UVM.
• Understanding of verification methodologies and constrained-random verification.
• Experience writing testbenches and debugging RTL.
• Programming in Python and/or C.
• Familiarity with Git or other version control systems.
• Exposure to RISC-V or CPU verification.
• Knowledge of formal verification.
• Experience with scripting and verification automation.
• Interest in open-source hardware and silicon development.

Responsibilities

• Develop and debug SystemVerilog/UVM testbenches.
• Create and execute verification plans, tests, and coverage.
• Debug simulation failures and support regression testing.
• Contribute to verification infrastructure and automation.
• Collaborate closely with design engineers to ensure high-quality silicon.
• Participate in code reviews and contribute to open-source projects.

Skills

SystemVerilog

UVM

Constrained-random

Testbenches

Python

C language

Git

RISC-V

Formal verification

Open-source hardware

Job description

We have an exciting opportunity for Digital Verification Engineer (1–5 Year's Experience) to join an innovative team developing high-quality open-source silicon used in production devices.

Location: Cambridge, UK (Hybrid)

Position: Permanent

About the Role

Working on projects such as OpenTitan Root of Trust and Ibex RISC-V CPU, you'll collaborate with world-leading partners and apply industry-standard verification methodologies to cutting-edge silicon designs.

As a Digital Verification Engineer, you'll contribute to the verification of complex digital designs at both block and system level. You'll work alongside experienced engineers, helping to develop robust verification environments while gaining exposure to production silicon and advanced verification methodologies.

Responsibilities

• Develop and debug SystemVerilog/UVM testbenches.
• Create and execute verification plans, tests, and coverage.
• Debug simulation failures and support regression testing.
• Contribute to verification infrastructure and automation.
• Collaborate closely with design engineers to ensure high-quality silicon.
• Participate in code reviews and contribute to open-source projects.

Requirements

• 1–5 years' industry experience in Digital Design Verification.
• Experience with SystemVerilog and UVM.
• Understanding of verification methodologies and constrained-random verification.
• Experience writing testbenches and debugging RTL.
• Programming experience in Python and/or C.
• Familiarity with Git or other version control systems.
• Strong communication skills and a collaborative mindset.
• Exposure to RISC-V or CPU verification.
• Knowledge of formal verification.
• Experience with scripting and verification automation.
• Interest in open-source hardware and silicon development.

What's on Offer?

• Collaborate with globally recognised semiconductor partners.
• Excellent learning and career development opportunities.
• Join a highly collaborative engineering team working on technology that is shaping the future of semiconductor design.