FPGA Design Architect for High-Speed AI Hardware

Normal Computing Corp.; Greater London; Vor Ort; GBP 90.000 - 120.000; Vollzeit

Zusammenfassung

Normal Computing Corp. in London seeks an FPGA Design Engineer to own the bridge between RTL and physical silicon.

You will bring physics-inspired ASIC designs to life on FPGA platforms for pre-silicon validation and early software development while building test infra for post-silicon bring-up. You will work with our silicon, EDA, and research teams across hardware, software, and physics, leading platform selection, RTL adaptation, and IP integration, with strong emphasis on PCIe and high-speed

Qualifikationen

• Proven FPGA design experience from RTL through timing closure to validated hardware.
• Expert-level SystemVerilog and/or VHDL with Xilinx Vivado proficiency.
• Hands-on PCIe, AXI/AHB, SPI, UART, JTAG interfaces and lab debugging.
• Strong Python for automation, test, and build tooling.

Aufgaben

• Lead FPGA platform ownership: select, procure, and bring-up prototyping boards for pre-silicon RTL validation.
• Translate RTL to FPGA targets and ensure timing closure on dense designs.
• Integrate in-house designs with vendor IP in AMD/Xilinx ecosystems.
• Design and validate high-speed PCIe interfaces for accelerators in servers.
• Build FPGA-based tester designs for silicon bring-up and characterization.
• Develop software layer around hardware: Python/C++ for register maps and automation.
• Perform lab debugging with ILA/Vivado, oscilloscopes, and BER/eye-diagram checks.

Kenntnisse

RTL to FPGA flow

SystemVerilog/VHDL

Python automation

Lab bring-up/debugging

Tools

Vivado

IP Integrator

Jobbeschreibung

Normal Computing Corp. in London seeks an FPGA Design Engineer to own the bridge between RTL and physical silicon.

You will bring physics-inspired ASIC designs to life on FPGA platforms for pre-silicon validation and early software development while building test infra for post-silicon bring-up. You will work with our silicon, EDA, and research teams across hardware, software, and physics, leading platform selection, RTL adaptation, and IP integration, with strong emphasis on PCIe and high-speed