FPGA Engineer

IC Resources

Greater London

On-site

GBP 95,000 - 130,000

Full time

14 days+

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Job summary

Intellectual Capital Resources Ltd in London is seeking a Senior FPGA Engineer to lead the development of high-performance FPGA-based AI inference systems. You will own architectures from design through RTL implementation, timing closure, verification and hardware validation, working with system architects, algorithm engineers and software teams to push the efficiency and throughput of AI workloads.

This stealth-mode start-up is well funded and offers early technical ownership, influence over

Qualifications

  • 5+ years FPGA/RTL design with ownership from architecture to hardware validation.
  • Strong RTL development using SystemVerilog.
  • Experience with high-throughput data paths and streaming architectures.
  • Understanding of flow control, buffering, queue management and clock-domain crossing.
  • Experience achieving timing closure on large FPGA designs.
  • Knowledge of high-speed interfaces such as PCIe, DDR/HBM, 100GbE or SerDes.
  • Experience with AMD Xilinx or Intel Altera FPGA platforms and associated development tools.
  • Strong simulation, verification and hardware debugging experience.
  • Experience with Python or Tcl for automation and verification.
  • Experience with AI/ML inference acceleration, SoC FPGAs, hardware/software co-design, DMA architectures, embedded C/C++, DSP implementation or low-power design techniques would be highly advantageous.

Responsibilities

  • Take ownership of FPGA architectures from initial design through RTL implementation, timing closure, verification and hardware validation.
  • Develop high-throughput data paths and optimise memory movement.
  • Integrate high-speed interfaces into AI acceleration systems.
  • Collaborate with system architects, algorithm engineers and software developers.
  • Provide hardware validation and debugging across platforms.

Skills

SystemVerilog
RTL design
FPGA architecture
PCIe/SerDes
Python/Tcl
Timing closure
Debugging hardware
C/C++ embedded
Team collaboration

Tools

Xilinx/Intel FPGA tools

Job description

Senior FPGA Engineer - London - AI Hardware Acceleration - Stealth Mode Start-Up

An exciting opportunity has arisen to join a well-funded, stealth-mode AI start-up in London, developing next-generation hardware acceleration technology designed to transform the efficiency and performance of AI inference.

Led by a highly technical Founder and CEO with a proven track record of successfully building technology start-ups, the company has already secured significant investment and is assembling a highly skilled engineering team to develop innovative AI computing architectures.

They are looking for a Senior FPGA Engineer to take a leading role in developing high-performance FPGA-based AI inference systems, pushing the boundaries of computational efficiency and overcoming the power limitations associated with today's AI workloads.

Working closely with system architects, algorithm engineers and software developers, you'll take ownership of complex FPGA architectures from initial design through RTL implementation, timing closure, verification and hardware validation. You'll be developing high-throughput data paths, optimising memory and data movement, and integrating high-speed interfaces into advanced AI acceleration systems.

This is a fantastic opportunity to join an ambitious, well-funded start-up at an early stage, where you'll have significant technical ownership, influence architectural decisions and play a key role in shaping the development of potentially disruptive AI hardware technology.

They are looking for a Senior FPGA Engineer with the following background:
  • 5+ years of FPGA or RTL design experience, with ownership of designs from architecture through to hardware validation
  • Strong RTL development using SystemVerilog
  • Experience architecting complex, high-throughput data paths and streaming architectures
  • Strong understanding of flow control, buffering, queue management and clock-domain crossing
  • Experience achieving timing closure on large, high-utilisation FPGA designs
  • Knowledge of high-speed interfaces such as PCIe, DDR/HBM, 100GbE or SerDes
  • Experience with AMD Xilinx or Intel Altera FPGA platforms and associated development tools
  • Strong simulation, verification and hardware debugging experience
  • Experience with Python or Tcl for automation and verification
  • Experience with AI/ML inference acceleration, SoC FPGAs, hardware/software co-design, DMA architectures, embedded C/C++, DSP implementation or low-power design techniques would be highly advantageous.
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