CPU Physical Design Engineer

IC Resources

Cambridge

On-site

GBP 70,000 - 110,000

Full time

12 days ago

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Job summary

IC Resources is seeking an experienced Physical Design Engineer to join its team, delivering high-performance CPU IP on advanced process nodes. You will participate in the full physical design flow from synthesis to sign-off in Cambridge.

Collaborating with RTL, architecture, STA and methodology teams, you will optimize timing, power and area, drive floorplanning, power planning, CTS and routing, and develop automation using TCL, Python or Perl.

Qualifications

  • Degree in Electrical/Electronic Engineering or related field.
  • Strong hands-on experience in Physical Design for ASIC/CPU/SoC designs.
  • Experience across full implementation flow including floorplanning, placement, CTS and sign-off.
  • Familiarity with industry-standard EDA tools such as Innovus, ICC2, Fusion Compiler.

Responsibilities

  • Drive the physical implementation of advanced CPU blocks from synthesis through to sign-off.
  • Take ownership of key physical design activities including floorplanning, power planning, placement, clock tree synthesis, routing and physical verification.
  • Work closely with RTL, architecture, STA and methodology teams to optimise designs for performance, power and area.
  • Analyse and resolve timing, congestion, power and DRC/LVS issues throughout the implementation cycle.
  • Develop and enhance automation, flows and methodologies using TCL, Python or Perl scripting.
  • Support design closure across advanced process technologies and contribute to best practices for future projects.
  • Collaborate with cross-functional teams to deliver high-quality silicon on aggressive project schedules.

Skills

Physical Design
ASIC/CPU design
Scripting (TCL)
Python
Perl

Education

Bachelor's degree in Electrical/Electronic Engineering or related

Tools

Innovus
ICC2
Fusion Compiler

Job description

A leading innovator in next-generation compute architectures, developing high-performance, power-efficient CPU technology on the most advanced process nodes, is looking for an experienced Physical Design Engineer to join its growing team. You will play a key role in the implementation of cutting-edge CPU IP within a world-class engineering organisation.

This is an opportunity to work alongside highly experienced engineers on complex CPU cores, contributing to the full physical design flow while helping to drive methodology improvements and achieve industry-leading PPA targets on advanced technology nodes.

In This Role, You Will
  • Drive the physical implementation of advanced CPU blocks from synthesis through to sign-off
  • Take ownership of key physical design activities including floorplanning, power planning, placement, clock tree synthesis, routing and physical verification
  • Work closely with RTL, architecture, STA and methodology teams to optimise designs for performance, power and area
  • Analyse and resolve timing, congestion, power and DRC/LVS issues throughout the implementation cycle
  • Develop and enhance automation, flows and methodologies using TCL, Python or Perl scripting
  • Support design closure across advanced process technologies and contribute to best practices for future projects
  • Collaborate with cross-functional teams to deliver high-quality silicon on aggressive project schedules
Ideal background
Candidates Are Likely To Have
  • A degree in Electrical/Electronic Engineering, Computer Engineering or a related discipline
  • Strong hands-on experience in Physical Design for complex ASIC or CPU/SoC designs
  • Experience across the full implementation flow including floorplanning, place and route, CTS and physical sign-off
  • Familiarity with industry-standard EDA tools such as Innovus, ICC2, Fusion Compiler or equivalent
  • Good understanding of timing closure, power optimisation and physical verification methodologies
  • Strong scripting skills with TCL, Python or Perl

This position offers the opportunity to work on industry-leading CPU technology, advanced process nodes and challenging technical problems within a highly respected engineering environment.

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