Senior CPU Physical Design Engineer – High-Performance Compute

European Tech Recruit; Cambridge; On-site; GBP 90,000 - 130,000; Full time

Job summary

European Tech Recruit in Cambridge, UK, is seeking a Senior/Staff Server CPU Physical Design Engineer to own block-level physical implementation for next-generation CPU cores. This permanent, onsite role targets high-performance compute platforms.

The candidate will drive timing closure, collaborate with RTL, architecture, circuits, CAD, SoC, and post-silicon teams, and advance PD flows and methodologies to improve PPA.

Qualifications

• Strong experience in physical design — synthesis, floorplanning, placement, CTS, routing, timing closure, ECOs, and signoff.
• Solid understanding of STA and timing closure methodologies, including PPA trade-offs.
• Hands-on experience with industry-standard EDA tools — Genus, Innovus, Fusion Compiler, PrimeTime, Tempus, Voltus, RedHawk, or equivalent.

Responsibilities

• Own or contribute to CPU block implementation from RTL/netlist to GDS
• Drive timing closure and physical implementation convergence across multiple modes, corners, and operating conditions.
• Debug and resolve complex implementation issues across timing, congestion, clocking, IR drop, power integrity, EM, and DRC/LVS.
• Collaborate with RTL, architecture, circuits, CAD, SoC, and post-silicon teams to improve design quality and PPA.
• Develop and enhance physical design flows, automation, and methodologies.

Skills

Physical design

Synthesis

Floorplanning

Timing closure

Tools

Genus

Innovus

Fusion Compiler

PrimeTime

Tempus

Voltus

RedHawk

Job description

European Tech Recruit in Cambridge, UK, is seeking a Senior/Staff Server CPU Physical Design Engineer to own block-level physical implementation for next-generation CPU cores. This permanent, onsite role targets high-performance compute platforms.

The candidate will drive timing closure, collaborate with RTL, architecture, circuits, CAD, SoC, and post-silicon teams, and advance PD flows and methodologies to improve PPA.