Physical Design Engineer

IC Resources; Cambridge; On-site; GBP 45,000 - 75,000; Full time

Job summary

IC Resources in Cambridge is seeking a Physical Design Engineer to contribute across the full chip development lifecycle, from netlist to GDSII, within a small team where your contributions have direct impact.

The role requires a strong academic background in Electronics or Electrical Engineering and at least two years in Physical Design, with hands-on experience in ASIC/SoC flows and cross-functional collaboration.

Qualifications

• A strong academic background in Electronics, Electrical Engineering or a related discipline.
• At least two years of industry experience within Physical Design or Physical Implementation.
• A solid understanding of modern ASIC implementation flows and methodologies.
• Strong communication skills and the ability to work effectively within cross-functional engineering teams.

Responsibilities

• The complete physical implementation flow, from netlist through to GDSII
• Floorplanning, power planning, placement and optimisation, clock tree synthesis, routing and physical verification closure
• Timing closure and static timing analysis
• Logic synthesis, equivalence checking and place-and-route methodologies
• Working on complex ASIC or SoC designs within advanced semiconductor environments

Skills

Strong communication skills

Education

Electronics or Electrical Engineering degree

Job description

Overview

I am currently working with an established technology company in Cambridge that develops a range of high-volume computing and embedded products. They are hiring a Physical Design Engineer to join its expanding team. This is an excellent opportunity to contribute across the full chip development lifecycle from early design stages through to silicon delivery and product release. The team is relatively small, giving engineers broad exposure and the opportunity to have a genuine impact on product development.

Responsibilities

• The complete physical implementation flow, from netlist through to GDSII
• Floorplanning, power planning, placement and optimisation, clock tree synthesis, routing and physical verification closure
• Timing closure and static timing analysis
• Logic synthesis, equivalence checking and place-and-route methodologies
• Working on complex ASIC or SoC designs within advanced semiconductor environments

Requirements

• A strong academic background in Electronics, Electrical Engineering or a related discipline
• At least two years of industry experience within Physical Design or Physical Implementation
• A solid understanding of modern ASIC implementation flows and methodologies
• Strong communication skills and the ability to work effectively within cross-functional engineering teams

This is a fantastic opportunity to join a company with a strong engineering culture, work on technically challenging products and become part of a close-knit team where your contributions will have a direct impact.

For more information on this opportunity, or other Physical Design positions across the UK and Europe, please contact Jordan Browne.