AMS Verification Engineer - Mixed-Signal Co-Simulation

TEEMA Group; City Of London; Sur place; GBP 70 000 - 110 000; Plein temps

Résumé du poste

TEEMA Group is partnering with a leading semiconductor firm to hire an AMS verification lead. You will own verification strategy for mixed-signal subsystems, define modeling fidelity, and drive co-simulation flows across Spice and digital simulators.

You will develop analog behavioral models, build self-checking testbenches, and establish functional coverage for analog corner behavior. Collaboration with analog and DSP teams and sign-off for tape-out are key milestones.

Qualifications

• BS/MS in Electrical Engineering or related field with 5+ years of analog/mixed-signal verification experience.
• Hands-on expertise with AMS modeling and verification: Verilog-AMS and real-number modeling (SystemVerilog real / wreal).
• Proficiency in SystemVerilog with assertion-based verification skills and testbench architecture.
• Ability to model analog blocks at appropriate abstraction levels and validate against transistor-level references.
• Strong debugging skills across analog/digital boundary with structured test planning and coverage.
• Comfort reading analog schematics and collaborating with analog and DSP designers.

Responsabilités

• Own the verification strategy and test plan for mixed-signal subsystems from block level to top-level integration.
• Define modeling approach and fidelity tiers and document accuracy vs runtime trade-offs.
• Develop and validate analog behavioral models against transistor-level references.
• Build self-checking testbenches and reusable verification components for AMS and mixed-signal interactions.
• Drive AMS co-simulation flows (Spice/FastSpice with digital simulators) and manage setup, performance, and runtime trade-offs.
• Define functional coverage and assertions targeting analog corner behavior (saturation, overflow, loop stability).
• Debug and root-cause failures across the analog/digital boundary and drive to closure.
• Partner with analog and DSP designers to translate analog intent into checkable models and tests.
• Own sign-off for tape-out with coverage closure and explicit verification statements.
• Build and maintain regression infrastructure and flow automation to improve AMS throughput.
• Contribute to silicon bring-up and lab correlation for model validation.

Connaissances

AMS modeling

Verilog-AMS

SystemVerilog real/wreal

AMS co-simulation

assertion-based verification

testbench design

debugging analog/digital

Formation

BS/MS in Electrical Engineering

Outils

Spectre AMS

FastSpice

Verilog-AMS

Description du poste

TEEMA Group is partnering with a leading semiconductor firm to hire an AMS verification lead. You will own verification strategy for mixed-signal subsystems, define modeling fidelity, and drive co-simulation flows across Spice and digital simulators.

You will develop analog behavioral models, build self-checking testbenches, and establish functional coverage for analog corner behavior. Collaboration with analog and DSP teams and sign-off for tape-out are key milestones.