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Arm is seeking a Senior Verification Engineer to verify RTL implementing upcoming features in the ARM SoC. You will collaborate with the RTL team, develop and enhance verification environments, and ensure new features meet specifications while protecting existing functionality.
The role requires 5+ years in IP/SOC verification, strong SystemVerilog/Verilog with UVM, and scripting skills in Perl or Python. Hybrid work model and supportive accommodations are provided.
Arm is seeking a Senior Verification Engineer to verify RTL implementing upcoming features in the ARM SoC. You will collaborate with the RTL team, develop and enhance verification environments, and ensure new features meet specifications while protecting existing functionality.
The role requires 5+ years in IP/SOC verification, strong SystemVerilog/Verilog with UVM, and scripting skills in Perl or Python. Hybrid work model and supportive accommodations are provided.