Senior HW IP Designer — SoC Interconnect RTL

Nutanix; Guyancourt; Sur place; EUR 85 000 - 120 000; Plein temps

Résumé du poste

Qualcomm France S.A.R.L. is seeking an experienced HW IP designer to join the QITC team in Guyancourt, France.

You will own unit specification, microarchitecture, RTL coding and verification, collaborating with architecture and verification teams across international sites.

The role requires strong RTL skills, experience with AMBA protocols, and a track record in ASIC design and interconnect technology.

Qualifications

• Bachelor's degree in Science, Engineering, or related field with 2+ years ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field with 1+ year of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field with relevant experience.

Responsabilités

• Starting from a Product Definition Requirement document, interact with Architecture to elaborate the unit specification.
• The specification is reviewed with peers and the verification team and becomes the RTL coding start point.
• Collaborate with verification to ensure understanding and verification of the specification across development phases.

Connaissances

Python

Verilog

C++

Git

Svn

NcSim

French

English

Formation

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Outils

AMBA protocols (AXI/CHI)

Description du poste

Qualcomm France S.A.R.L. is seeking an experienced HW IP designer to join the QITC team in Guyancourt, France.

You will own unit specification, microarchitecture, RTL coding and verification, collaborating with architecture and verification teams across international sites.

The role requires strong RTL skills, experience with AMBA protocols, and a track record in ASIC design and interconnect technology.