Senior HW IP designer - Qualcomm - Guyancourt, France

Qualcomm; Guyancourt; Sur place; EUR 100 000 - 140 000; Plein temps

Résumé du poste

Qualcomm France-QITC is seeking an experienced HW IP designer to shape the next generation of ASIC interconnects. You will drive unit specifications, collaborate with architecture and verification teams, and translate requirements into RTL code from product definitions.

You will function in a multi-site, international context, advancing debug and ECO processes and contributing to cutting-edge interconnect technology for Qualcomm’s SoC designs.

Qualifications

• Master’s degree in electrical engineering, digital design
• 8–10 years of microelectronics definition and design
• Ability to create robust micro-architectures.
• Ability to write clear specification documents.
• Proficient in RTL coding/simulation.
• Good knowledge of SOC/ASIC design flow.
• Knowledge of AMBA protocols, AXI, CHI, ...
• Self-driven with strong analytical and communication skills
• Ability to work in an international and multi-sites context.

Responsabilités

• Draft unit specifications from Product Definition Requirement documents.
• Review specifications with peers and verification team to start RTL coding and verification.
• Collaborate with the verification team to ensure specifications are understood and verified.
• Work with exploration and support teams as needed.
• Contribute expertise for debugging and ECO implementation when required.

Connaissances

Python

Verilog

C++

RTL coding

Git SVN

NcSim

French

English

Formation

Master’s degree in Electrical Engineering or digital design

Description du poste

Overview

Qualcomm is a global leader in wireless technology and innovation. Our cutting-edge solutions power the world’s most advanced mobile, automotive, networks and IoT devices. We are seeking a talented, experimented, and motivated HW IP designer to join our team in Qualcomm France-QITC and contribute to the next generation of semiconductor designs. Qualcomm Interconnect Technology Center (QITC) has been breaking ground in interconnect design for 15 years by providing more efficient SoC NoC with faster time to market than existing bus interconnects and continues to innovate and deliver technology in line with the very latest evolutions in SoC design. Our work is at the backbone of the SoC, interconnecting all major IP solutions at Qualcomm. As a HW IP designer, you will join a tightly knit team of seasoned engineers, bring your creativity to the team and will be the owner of different units from specification, microarchitecture to RTL code.

Preferred Qualifications

• Master’s degree in electrical engineering, digital design
• 8-10 years of microelectronics definition and design
• Ability to create robust micro-architectures.
• Ability to write clear specification document.
• Proficient in RTL coding/simulation.
• Good acknowledge of SOC/ASIC design flow.
• Good knowledge of AMBA protocols, AXI, CHI, ...
• Self-driven, analytical, creative and methodical.
• Teamwork spirit with good oral and written communication skills.
• Ability to work in an international and multi-sites context.

Principal Duties and Responsibilities

• Starting from a Product Definition Requirement document, you will interact with the Architecture team and elaborate the specification of the Unit.
• The specification document will then be reviewed with peers and the verification team and will be the starting point for RTL coding and verification.
• You will have to work closely with the verification team to make sure that the specification is well understood and verified, during all the development phases.
• You will also have to collaborate with exploration and support teams.
• Eventually you will also have to bring your expertise for debug and performs ECO when necessary.

Skills

• Python/Verilog/C++
• Git/Svn
• NcSim
• French/English

Minimum Qualifications

• Bachelor\'s degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. OR Master\'s degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field.

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Equal Opportunity and Accommodations

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm\'s toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Note to Agencies

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If you would like more information about this role, please contact Qualcomm Careers.