Senior HW IP Architect for SoC Interconnect & RTL

Qualcomm; Guyancourt; Sur place; EUR 70 000 - 95 000; Plein temps

Résumé du poste

Qualcomm France S.A.R.L. in Guyancourt is seeking a talented HW IP designer to join the QITC team. You will start from a Product Definition Requirement, elaborate the Unit specification, and drive RTL coding and verification with the architecture and verification teams.

The ideal candidate holds a Master’s degree in electrical engineering and 8–10 years of microelectronics experience, with strong RTL, AMBA/AXI knowledge, and the ability to work across international sites.

Qualifications

• Master’s degree in electrical engineering, digital design
• 8-10 years of microelectronics definition and design
• Ability to write clear specification document
• Proficient in RTL coding/simulation
• Good knowledge of SOC/ASIC design flow
• Good knowledge of AMBA protocols (AXI/CHI) and related interfaces

Responsabilités

• Starting from a Product Definition Requirement, elaborate the unit specification with Architecture team
• Specification reviewed with peers and verification team, used as a basis for RTL coding and verification
• Collaborate with verification team to ensure specification is understood and verified
• Work with exploration and support teams and participate in debugging and ECOs as needed

Connaissances

Python

Verilog

C++

Formation

Master's degree in Electrical Engineering

Bachelor's degree in Science/Engineering

PhD in Science/Engineering

Outils

Git/Svn

NcSim

Description du poste

Qualcomm France S.A.R.L. in Guyancourt is seeking a talented HW IP designer to join the QITC team. You will start from a Product Definition Requirement, elaborate the Unit specification, and drive RTL coding and verification with the architecture and verification teams.

The ideal candidate holds a Master’s degree in electrical engineering and 8–10 years of microelectronics experience, with strong RTL, AMBA/AXI knowledge, and the ability to work across international sites.