RISC-V Matrix/Vector ISA Benchmark Intern

CEA; Grenoble; Vor Ort; EUR 11.000 - 16.000; Vollzeit

Benefits dieser Stelle

Accommodation in Grenoble

Public transportation benefits

Zusammenfassung

The French Alternative Energies and Atomic Energy Commission (CEA) invites engineering students in their final year to an internship focused on benchmarking RISC-V matrix/vector ISA extensions in an embedded platform. You will work with an energy-efficient digital IC group and have access to state-of-the-art resources in Grenoble to install forks, assemble a software chain, and run performance tests.

The role emphasizes profiling with RTL/systemC simulators, potential ASIC mapping, and possible

Qualifikationen

• Master's or engineering student in final year with a background in electronics or computer engineering.
• Solid knowledge of computer architectures and digital design.
• Familiarity with RISC-V microprocessors or architectural simulators is a plus.

Aufgaben

• Benchmark and analyze the performance of RISC-V vector and matrix ISA extensions.
• Profile performance and resource utilization using RTL simulators and architectural emulators (e.g., QEMU).
• Set up a benchmark test suite and software chain for embedded low-energy computation (e.g., GCC, linker).
• Map architectures on ASIC technology for performance evaluation if time allows.

Kenntnisse

RISC-V

SystemC

UNIX scripting

Git

GCC

Ausbildung

Master student in engineering

Tools

RTL

QEMU

Jobbeschreibung

The French Alternative Energies and Atomic Energy Commission (CEA) invites engineering students in their final year to an internship focused on benchmarking RISC-V matrix/vector ISA extensions in an embedded platform. You will work with an energy-efficient digital IC group and have access to state-of-the-art resources in Grenoble to install forks, assemble a software chain, and run performance tests.

The role emphasizes profiling with RTL/systemC simulators, potential ASIC mapping, and possible