Internship: Formal Verification of Embedded Software

CEA; Saclay; On-site; EUR 14,000 - 17,000; Full time

Job summary

CEA is seeking an intern to work on the correctness of iterative exploration of critical embedded software architectures at Saclay. You will study the QuaRTOS-DSE model, verify preservation properties, and contribute to extending multicore models for task migration and interference.

Expected to have a Master’s degree in a relevant field, fluent English, and a strong interest in formal verification techniques and model checking.

Qualifications

• Master's degree or equivalent in CS or a related field.
• Knowledge of formal methods (temporal logic, model checking).
• Fluent English and teamwork skills.
• Interest in safety-critical and embedded software.

Responsibilities

• Study QuaRTOS-DSE formal model and TLC models.
• Complete equivalence properties between architectures to reach a sufficient condition.
• Propose a solution or proof for coverage of properties under iterative exploration Mi ≈ Mi+1 ≈ … ≈ Mk.
• Extend the multicore model to account for task migration and interference from shared resources.
• Evaluate proposals on use cases, including an industrial protection relay.

Skills

Embedded software

Formal methods

Fluent English

Teamwork

Curiosity

Education

Master's degree / Bac+5

Job description

CEA is seeking an intern to work on the correctness of iterative exploration of critical embedded software architectures at Saclay. You will study the QuaRTOS-DSE model, verify preservation properties, and contribute to extending multicore models for task migration and interference.

Expected to have a Master’s degree in a relevant field, fluent English, and a strong interest in formal verification techniques and model checking.