NoC Verification Engineer — UVM & VIP Pro

Nutanix; Guyancourt; Sur place; EUR 55 000 - 76 000; Plein temps

Résumé du poste

Qualcomm France S.A.R.L. is seeking a verification engineer to join the NoC verification tool team. You will verify NoC-level features, develop UVM benches, and maintain Python-generated test suites in a Linux environment.

You will work with Verilog, SystemVerilog, and UVM, contributing to automated regression suites and VIPs for NoC protocols, with a focus on reliability and maintainability.

Qualifications

• Master’s degree in Science, Engineering, or related field.
• Bachelor’s degree in Science, Engineering, or related field.
• 2 years+ hardware design/verification experience is preferred.
• Experience with UVM components or VIPs is a plus.
• Strong debugging and analytical skills.

Responsabilités

• Verify NoC-level features.
• Develop and maintain UVM benches and the software that generates them (Python).
• Develop and maintain UVM VIPs for NoC communication protocols.
• Extend and maintain fully automated verification regressions.

Connaissances

Hardware verification

UVM components

Debugging

Object-oriented programming

Python scripting

Formation

Master’s degree in Science/Engineering

Bachelor’s degree in Science/Engineering

Outils

Verilog

SystemVerilog

UVM

Linux

Git

Description du poste

Qualcomm France S.A.R.L. is seeking a verification engineer to join the NoC verification tool team. You will verify NoC-level features, develop UVM benches, and maintain Python-generated test suites in a Linux environment.

You will work with Verilog, SystemVerilog, and UVM, contributing to automated regression suites and VIPs for NoC protocols, with a focus on reliability and maintainability.