NoC Power & Interconnect Solutions Lead

Qualcomm; Guyancourt; Sur place; EUR 70 000 - 110 000; Plein temps

Résumé du poste

Qualcomm France S.A.R.L. in Île-de-France seeks a senior engineer to deploy and support NoC technology across Qualcomm SoCs. You will collaborate with Architecture, Hardware, software, verification and emulation teams, driving interconnect requirements and power architectures for multiple SoCs.

The role emphasizes power-aware interconnect design, NoC validation, and creating training material for global teams. Strong communication and experience in ASIC/SoC design are essential.

Qualifications

• Master’s degree in Microelectronics, Computer Science, or related field.
• 4+ years of ASIC design, verification, validation, integration, or related work.
• Equivalent experience considered for principal duties.

Responsabilités

• Collaborate with Architecture, Hardware, software, verification, emulation teams to ensure NoC tech is used efficiently.
• Define interconnect requirements and configuration in various SoCs.
• Provide support on power issues and NoC technology of new solutions.
• Resolve NoC power micro-architecture and unit integration issues.
• Develop in-depth technical material and organize training for teams worldwide.

Connaissances

SoC development flow

NoC protocols (AHB/AXI/CHI/ACE)

Power/low-power techniques

Debug in simulation/emulation

Strong communication skills

Interconnect architectures

Formation

Bachelor’s degree in Science, Engineering, or related field

Master’s degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Description du poste

Qualcomm France S.A.R.L. in Île-de-France seeks a senior engineer to deploy and support NoC technology across Qualcomm SoCs. You will collaborate with Architecture, Hardware, software, verification and emulation teams, driving interconnect requirements and power architectures for multiple SoCs.

The role emphasizes power-aware interconnect design, NoC validation, and creating training material for global teams. Strong communication and experience in ASIC/SoC design are essential.