NoC Verification Engineer - UVM, VIPs & Automation

Qualcomm; Guyancourt; On-site; EUR 55,000 - 85,000; Full time

Job summary

Qualcomm France S.A.R.L. is seeking a NoC verification engineer to develop and maintain verification components, benches, and automation tools. The role sits at the crossroad of software and hardware IP verification, using Verilog, SystemVerilog, UVM, and Python.

A Master’s or Bachelor’s degree in science/engineering is required, with experience in hardware design/verification encouraged. Join Qualcomm’s NoC Verification Tool Team to advance interconnect IP verification, improve regressions, and

Qualifications

• Master’s degree in Science, Engineering, or related field.
• Bachelor’s degree in Science, Engineering, or related field.
• 2+ years in hardware design/verification is preferred.
• Experience with UVM components, benches, or VIPs is advantageous.
• Strong debugging and problem-solving abilities.

Responsibilities

• Verify NoC-level features.
• Develop and maintain UVM benches and the software that generates them (Python).
• Develop and maintain UVM VIPs for NoC communication protocols.
• Extend and maintain fully automated verification regressions.

Skills

Hardware design/verification

UVM components/bench/VIPs

Debugging skills

Object-oriented programming

Eager to learn

Education

Master’s degree in Science or Engineering

Bachelor’s degree in Science or Engineering

Tools

Verilog

SystemVerilog

UVM

Python

Linux

Job description

Qualcomm France S.A.R.L. is seeking a NoC verification engineer to develop and maintain verification components, benches, and automation tools. The role sits at the crossroad of software and hardware IP verification, using Verilog, SystemVerilog, UVM, and Python.

A Master’s or Bachelor’s degree in science/engineering is required, with experience in hardware design/verification encouraged. Join Qualcomm’s NoC Verification Tool Team to advance interconnect IP verification, improve regressions, and