Lead Mixed-Signal Verification Engineer, SoC

Arago Inc.; Paris; On-site; EUR 85,000 - 130,000; Full time

Job summary

Arago is seeking a Senior Mixed-Signal Verification Engineer to own the verification methodology for digital-to-analog interfaces on its SoCs. You will work across analog, RTL, architecture, and firmware teams to ensure correct integration and sign-off.

You will verify mixed-signal blocks, build verification environments, and develop tests, assertions, and coverage while debugging RTL, models, clocks, and analog behavior. Excellent English required.

Qualifications

• Strong hands-on experience in ASIC/SoC verification.
• Experience verifying mixed-signal blocks or D/A and A/D interfaces.
• Strong SystemVerilog skills and experience with UVM or equivalent verification methodology.
• Experience building verification environments and tests, assertions, scoreboards, and coverage.
• Good understanding of digital design fundamentals and analog/mixed-signal concepts.
• Strong debugging skills across RTL, models, clocks, resets, configuration and analog behavior.
• Experience with scripting/automation (Python, Tcl, shell).
• Proficiency in English.

Responsibilities

• Own the mixed-signal verification methodology and plan for Arago SoCs.
• Build and maintain verification environments at block, subsystem and SoC levels.
• Develop tests, assertions, checkers, scoreboards, and functional coverage.
• Verify digital control and configuration of analog/mixed-signal circuitry across operation, corner cases and errors.
• Run regressions, analyze coverage, debug failures, and drive sign-off.
• Develop or integrate models for efficient mixed-signal simulation.
• Collaborate with analog, RTL, architecture, firmware, and SoC teams to resolve interfaces.

Skills

ASIC/SoC verification

Mixed-signal verification

SystemVerilog/UVM

Verification environments

Digital/Analog fundamentals

RTL/analog debugging

Python scripting

English proficiency

High-speed interfaces

RNM/Verilog-AMS

SoC integration

UPF/power-state

Tools

Verilog-AMS

Job description

Arago is seeking a Senior Mixed-Signal Verification Engineer to own the verification methodology for digital-to-analog interfaces on its SoCs. You will work across analog, RTL, architecture, and firmware teams to ensure correct integration and sign-off.

You will verify mixed-signal blocks, build verification environments, and develop tests, assertions, and coverage while debugging RTL, models, clocks, and analog behavior. Excellent English required.