Lead Digital IC Verification Engineer – RISC-V/SoC

microTECH Global LTD; Grenoble; On-site; EUR 65,000 - 90,000; Full time

Job summary

microTECH Global LTD in Grenoble is seeking a Digital IC Verification Engineer to drive verification strategies across multiple SoCs and custom ASICs. You will own testbench development, verification plans, and ensure high-quality coverage from specification to silicon.

The ideal candidate has 5+ years in digital RTL verification, strong SystemVerilog/UVM, SVA/Formal verification knowledge, and experience with embedded software and Python-based verification tools.

Qualifications

• 5+ years of digital RTL verification experience.
• Strong expertise in SystemVerilog, UVM and IP/SoC verification.
• Experience with embedded software development and Python-based verification tools.
• Knowledge of SVA and Formal Verification techniques.
• Understanding of RTL design and SoC architectures.
• Experience taking projects from specification through to completion.

Responsibilities

• Define verification strategies, testbench architectures and detailed verification plans.
• Develop verification environments, testbenches and sequences using SystemVerilog, UVM and C-based methodologies.
• Drive verification quality and maximise functional coverage.
• Improve verification methodologies, flows and automation.
• Apply SVA and Formal Verification techniques.
• Collaborate with RTL design and architecture teams.
• Mentor junior engineers and contribute to projects from specification through to silicon validation.

Skills

SystemVerilog

UVM

IP/SoC verification

Embedded software

Python-based verification tools

Education

Master's degree or PhD in Microelectronics, Electronics or equivalent

Tools

Python

Job description

microTECH Global LTD in Grenoble is seeking a Digital IC Verification Engineer to drive verification strategies across multiple SoCs and custom ASICs. You will own testbench development, verification plans, and ensure high-quality coverage from specification to silicon.

The ideal candidate has 5+ years in digital RTL verification, strong SystemVerilog/UVM, SVA/Formal verification knowledge, and experience with embedded software and Python-based verification tools.