Intern Mixed Signal IP

Cadence Design Systems, Inc.; Valbonne; On-site; EUR 12,000 - 18,000; Full time

Job summary

Cadence Design Systems, Inc. seeks an intern for Advanced Node Process Monitor Design at Sophia‑Antipolis, France. The internship lasts 6 months with an early 2027 start, offering hands‑on experience in monitoring process variations in mixed‑signal IP development.

You will work with the Mixed‑Signal IP R&D team to review options, design circuits, and benchmark performance, contributing to the Cadence MSIP product roadmap and gaining exposure to cutting‑edge technology nodes.

Qualifications

• Final-year master student in electrical/electronic engineering.
• Interest in circuit design and semiconductor technology.
• Some exposure to Cadence Virtuoso or similar analog design tools.

Responsibilities

• Investigate available analog and digital circuit options to monitor process variations.
• Design and benchmark these circuits.
• Review state-of-the-art technology and contribute to the MSIP roadmap.

Skills

Circuit design interest

Analog design tools exposure

Education

Master's degree in electrical/electronic engineering

Tools

Cadence Virtuoso

Job description

VALBONNE (Sophia)

Full time

R56280

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.

Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

We are looking for an intern in Advanced Node Process Monitor Design

Title: Intern

Location: Sophia-Antipolis, France

Duration: 6 months

From: early Q1 2027

Internship Description

Are you curious about advanced technology nodes in microelectronics and eager to gain hands‑on experience using them to tackle real engineering challenges? Do you enjoy solving problems and finding smarter ways to work? If so, we'd love to hear from you.

At Cadence, we believe great candidates come from a variety of backgrounds and experiences. You do not need to be an expert in microelectronics or transistor technologies to apply. We are looking for motivated and curious individuals who are eager to learn and excited about exploring how today’s technologies and transistors can be used to address real engineering challenges.

As semiconductor technology scales to ever‑shrinking, advanced nodes, transistor variability during production (process variation) presents a critical challenge for integrated circuit design. Because of these variations, two integrated circuits originating from different wafers can exhibit significantly different behaviour.

Efficiently sensing process variations allows systems to be trimmed post‑production, enabling an adaptive (rather than purely predictive) design approach, leading to tighter margins and superior performance at the system level. Embedded circuits capable of efficiently tracking process variations have therefore become increasingly critical in modern SoCs.

In this internship, you will work with the Mixed‑Signal IP R&D team to investigate available analog and digital circuit options to monitor process variations. After a thorough review of the state of the art, you will design and benchmark these circuits. Positioned at the intersection of circuit design and semiconductor physics, this project offers hands‑on design experience in the mixed‑signal domain, exposure to cutting‑edge technology nodes, and the opportunity to directly contribute to the Cadence Mixed‑Signal IP (MSIP) product roadmap.

Internship Requirements

• Currently completing the final year of a master’s degree in electrical and/or electronic engineering.
• A genuine interest in circuit design and semiconductor technology.
• Some exposure to analog design EDA tools, such as Cadence Virtuoso, would be a plus.

We’re doing work that matters. Help us solve what others can’t.

Equal Employment Opportunity Policy

Cadence is committed to equal employment opportunity throughout all levels of the organization.

• Read the policy(opens in a new tab) (https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/careers/equal-employment-opportunity-policy.pdf)

We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact [e-mail].

Privacy Policy:

Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (https://www.cadence.com/en_US/home/privacy/privacy-policy.html) .

E-Verify Cadence participates in the

E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/careers/e-verify-participation-poster.pdf)

Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.