FPGA Automation & Flow Optimization Intern (Hybrid)

Siemens AG

Meudon

On-site

EUR 12,000 - 15,000

Full time

4 days ago
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Benefits offered by this job

Meal vouchers
Mentorship program
Learning Hub access

Job summary

Siemens Software in Meudon (Paris area), France, offers a 5–6 month Strategic Student Program internship, starting February 2027, focused on FPGA automation and flow optimization using AMD Vivado DFX. You will bridge digital design with software automation, building robust automation tooling and parallel compilation workflows.

The role requires pursuing BAC+5 in engineering, strong scripting skills in Tcl/Python, HDL proficiency, and fluency in French and English.

Qualifications

  • Good understanding of FPGA design flows and hands-on experience using AMD Vivado for synthesis and implementation.
  • Strong scripting capabilities in Tcl and/or Python, and familiarity with executing EDA tools via batch or command-line interfaces.
  • Proficiency in HDL (Verilog/SystemVerilog or VHDL) and basic timing constraints (XDC) and static timing analysis.

Responsibilities

  • State-of-the-Art Research: Review academic and industry literature regarding advanced compile-time reduction methodologies and modular compilation flows in modern FPGA tools.
  • Design & Flow Architecture: Implement a synthetic benchmark application designed to evaluate the physical routing and timing overheads of independent modular implementation.
  • Automation Development: Develop an automated Tcl and Python scripting pipeline to manage global system infrastructure, resolve module boundary timing constraints, and export isolated checkpoints.

Skills

FPGA Tools & Flow
Automation & Scripting
HDL (Verilog/SystemVerilog or VHDL)
French/English bilingual
Autonomous & collaborative

Education

BAC+5 engineering in France

Tools

AMD Vivado

Job description

Siemens Software in Meudon (Paris area), France, offers a 5–6 month Strategic Student Program internship, starting February 2027, focused on FPGA automation and flow optimization using AMD Vivado DFX. You will bridge digital design with software automation, building robust automation tooling and parallel compilation workflows.

The role requires pursuing BAC+5 in engineering, strong scripting skills in Tcl/Python, HDL proficiency, and fluency in French and English.

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