ATE Test Engineer - Semiconductor Validation & Automation

Cadence Design Systems; France; Sur place; EUR 42 000 - 68 000; Plein temps

Résumé du poste

Cadence Design Systems in Valbonne, France, seeks an ATE Test Engineer to join the semiconductor test engineering team. You will help develop, validate, and optimize Automated Test Equipment solutions to characterize and qualify advanced devices and IP products, collaborating across France, India, and the United States.

The role offers exposure to silicon bring-up, data analysis, and test optimization in a global, collaborative environment, with opportunities to grow expertise in semiconductor

Qualifications

• Master's degree in Electrical Engineering, Microelectronics, Electronics, Computer Engineering, or related field
• 3–6 years experience; juniors welcome to apply

Responsabilités

• Develop, debug, and maintain ATE test programs for wafer sort and final test
• Convert design test patterns into ATE-compatible formats
• Generate and execute functional, parametric, characterization, and debug test programs
• Define test strategy, coverage, and limits in alignment with design specifications
• Perform silicon bring-up, characterization, and shmoo analysis
• Collect, process, and analyze ATE data using scripts and tools
• Debug failing devices with cross-functional teams
• Contribute to test methodologies and best practices
• Optimize test time, cost, and quality
• Support production ramp and customer qualification
• Use lab equipment for validation and debug
• Contribute to loadboard and hardware interface development

Connaissances

Semiconductor testing know-how

C/C++ or Python

Data analysis and debugging

English proficiency

Formation

Master's degree in Electrical Engineering or related field

Outils

Advantest 93K

Teradyne

Loadboards

Description du poste

Cadence Design Systems in Valbonne, France, seeks an ATE Test Engineer to join the semiconductor test engineering team. You will help develop, validate, and optimize Automated Test Equipment solutions to characterize and qualify advanced devices and IP products, collaborating across France, India, and the United States.

The role offers exposure to silicon bring-up, data analysis, and test optimization in a global, collaborative environment, with opportunities to grow expertise in semiconductor