ASIC Design & Verification Engineer

QUALCOMM, Inc.; Guyancourt; Sur place; EUR 65 000 - 90 000; Plein temps

Résumé du poste

Qualcomm France S.A.R.L. invites skilled ASIC Engineers to define, model, design and verify IP blocks and SoCs for high-performance, low-power products. You will collaborate with software and hardware teams to ensure optimal implementation and documentation.

Candidates should have master's or PhD in related fields and 2+ years of ASIC experience, with proficiency in design and verification tools and scripting languages. On-site in France is preferred.

Qualifications

• Bachelor's degree in Science/Engineering with 2+ years ASIC design/verification.
• Master's in Science/Engineering with 1+ year experience or PhD in related field.
• Experience with architecture and design tools and scripting languages.

Responsabilités

• Defines, models, designs, verifies, validates, implements, and documents IP for high-performance ASICs.
• Collaborates across software and hardware teams to meet system requirements.
• Evaluates design flow from high-level design to synthesis and place-and-route.

Connaissances

ASIC design

Verification

SystemVerilog

RTL coding

Formation

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Outils

Virtuoso

RTL to GDS Flow

Scripting languages

EDA tools

Description du poste

Qualcomm France S.A.R.L. invites skilled ASIC Engineers to define, model, design and verify IP blocks and SoCs for high-performance, low-power products. You will collaborate with software and hardware teams to ensure optimal implementation and documentation.

Candidates should have master's or PhD in related fields and 2+ years of ASIC experience, with proficiency in design and verification tools and scripting languages. On-site in France is preferred.