Senior Physical Design Automation Engineer

Aion Silicon Ltd; Barcelona; On-site; EUR 70,000 - 100,000; Full time

Job summary

Aion Silicon Ltd in Barcelona, Spain seeks a Senior Methodology Engineer to lead RTL-to-Signoff physical design automation and quality systems for complex SoC/ASIC projects. You will build scalable automation frameworks and improve silicon delivery across advanced nodes.

The role combines hands-on EDA tool experience (Cadence Innovus, Tempus, Voltus, Pegasus) with software skills (Python, Tcl, Perl, Shell, C++), and requires strong problem solving and cross-team collaboration.

Qualifications

• Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related field.
• 4+ years of experience in Physical Design, CAD Methodology, or Design Automation.
• Strong understanding of the complete ASIC/SoC implementation flow from RTL to GDSII Signoff.
• Hands-on experience with industry-standard EDA tools and flow customization.
• Experience with advanced technology nodes (7nm, 5nm, 3nm, or below).
• Strong knowledge of hierarchical and top-down design methodologies.
• Experience in Physical Design flow automation, CAD infrastructure, and methodology development.
• Exposure to AI/ML or LLM-based solutions for EDA automation and productivity enhancement.

Responsibilities

• Develop and maintain automation frameworks supporting the RTL-to-Signoff Physical Design flow.
• Build methodology solutions for synthesis, floorplanning, power planning, placement, CTS, routing, timing closure, and signoff.
• Create quality checking, validation, and reporting systems for implementation and signoff metrics.
• Develop scalable tools, scripts, and data pipelines for design analysis, productivity enhancement, and methodology optimization.
• Collaborate with Physical Design, STA, DFT, RTL, Library, and CAD teams to improve implementation methodologies and design quality.
• Drive continuous improvements in timing, power, area, congestion, IR/EM, and physical verification closure.
• Define and maintain best practices, design guidelines, and signoff methodologies across multiple projects.
• Support advanced-node implementation challenges through innovative automation and data-driven solutions.

Skills

Python

Tcl

Perl

Shell

C++

Education

Bachelor's or Master's degree

Tools

Innovus

Tempus

Voltus

Pegasus

Job description

Aion Silicon Ltd in Barcelona, Spain seeks a Senior Methodology Engineer to lead RTL-to-Signoff physical design automation and quality systems for complex SoC/ASIC projects. You will build scalable automation frameworks and improve silicon delivery across advanced nodes.

The role combines hands-on EDA tool experience (Cadence Innovus, Tempus, Voltus, Pegasus) with software skills (Python, Tcl, Perl, Shell, C++), and requires strong problem solving and cross-team collaboration.