Senior Digital IC Designer — Cadence & VLSI Expert

TMRW; Madrid; Vor Ort; EUR 60.000 - 90.000; Vollzeit

Zusammenfassung

The TMRW Foundation SILICON in Barcelona, Spain, is seeking a Digital IC Designer to develop, simulate, and verify complex digital ICs. You will work on RTL coding using Verilog/VHDL and ensure designs meet performance, power, and area targets.

The role requires hands-on experience with Cadence EDA tools (Genus, Innovus, Tempus, Virtuoso), strong collaboration with cross-functional teams, and clear technical documentation to support tape-out and fabrication readiness.

Qualifikationen

• Bachelor’s or Master’s degree in Electrical/Computer Engineering with a VLSI focus.
• Proven experience in digital IC design with a strong project portfolio.
• Cadence digital design flow expertise including Virtuoso, Genus, Innovus, Tempus and verification tools.
• Familiarity with industry-standard EDA tools (Synopsys, Mentor Graphics).
• Proficiency in Verilog and VHDL.
• Knowledge of semiconductor physics and fabrication processes.
• Knowledge of low-power design techniques.
• Scripting (Tcl, Perl, Python) to automate design flows.
• Strong analytical and communication skills; able to work in a team.

Aufgaben

• RTL design and development using VHDL/Verilog based on specifications.
• Simulation and verification of ICs using Cadence tools to validate performance.
• Synthesis and physical design tasks including floorplanning, placement, and routing.
• Timing analysis and signoff using Tempus.
• Physical verification with DRC/LVS using Pegasus/Innovus.
• Collaborate with system architects, analog designers, and layout engineers.
• Create and maintain design documentation, reports and test plans.

Kenntnisse

Digital IC design

Verilog/VHDL

Low-power design

Scripting (Tcl, Python, Perl)

Analytical thinking

Ausbildung

Bachelor’s or Master’s in EE/CE focusing on VLSI

Tools

Cadence tools (Genus, Innovus, Tempus, Virtuoso)

SimVision

Synthesis/Timing tools

Synopsys/Mentor familiarity

Jobbeschreibung

The TMRW Foundation SILICON in Barcelona, Spain, is seeking a Digital IC Designer to develop, simulate, and verify complex digital ICs. You will work on RTL coding using Verilog/VHDL and ensure designs meet performance, power, and area targets.

The role requires hands-on experience with Cadence EDA tools (Genus, Innovus, Tempus, Virtuoso), strong collaboration with cross-functional teams, and clear technical documentation to support tape-out and fabrication readiness.