Senior FPGA & Digital Design Engineer (RTL-to-Silicon)

Analog Devices; Valencia; Presencial; EUR 70.000 - 110.000; Jornada completa

Descripción de la vacante

Analog Devices, Inc. is seeking a Senior Digital Design Engineer in Valencia to drive FPGA prototyping, RTL design, and block architectural specification. You will interact with customers and cross-functional teams to meet timing, area, low-power, DFT, and manufacturing test targets.

Strong collaboration with verification and analog teams is essential for silicon conversion. The role requires deep FPGA development knowledge, Verilog/SystemVerilog RTL skills, and experience with AHB/AXI protocols

Formación

• Architectural design and specification of complex systems, especially in system on chip with processors.
• Deep knowledge of FPGA development flow
• FPGA modelling
• Verilog/SystemVerilog RTL design - emphasis on AHB/AXI and ARM cores
• Design to meet timing, area, low-power, manufacturing test and timing targets
• Interaction with verification and analog teams
• Interaction with implementation team to convert RTL to silicon
• Working with architecture and design teams to determine functionality protocols

Responsabilidades

• FPGA prototyping of design
• Development of models & self-checking mechanisms for FPGA
• HW & SW co-design
• Architectural design and specification of blocks
• Verilog/SystemVerilog RTL design
• Interaction with customer and stakeholders
• Design to meet timing, area, low-power, DFT, manufacturing test and timing targets
• All aspects of design work including interaction with verification and analog team
• Interaction with implementation team to convert RTL to silicon

Conocimientos

Interpersonal skills

Teamwork

Communication

Problem solving

Attention to detail

Self-motivation

Herramientas

UVM

Descripción del empleo

Analog Devices, Inc. is seeking a Senior Digital Design Engineer in Valencia to drive FPGA prototyping, RTL design, and block architectural specification. You will interact with customers and cross-functional teams to meet timing, area, low-power, DFT, and manufacturing test targets.

Strong collaboration with verification and analog teams is essential for silicon conversion. The role requires deep FPGA development knowledge, Verilog/SystemVerilog RTL skills, and experience with AHB/AXI protocols