Senior DFT (Design for Test) Engineer

Capgemini; Gaià; Hybrid; EUR 60,000 - 80,000; Full time

Benefits offered by this job

Hybrid work

Training and certifications

Health and life insurance

Referral program with bonuses

International projects

Job summary

Capgemini Engineering is seeking a Senior DFT Engineer to implement and verify advanced DFT solutions across complex SOCs. You will drive block- and top-level insertion, ATPG validation, and timing-aware testability while collaborating with Physical Design and STA teams.

You will develop robust test patterns, optimize fault coverage and support silicon bring-up, contributing to continuous improvements in DFT methodologies and automation.

Qualifications

• 6+ years hands-on experience with DFT and test flows for large SOCs.
• Knowledge of JTAG, ATPG, yield learning, logic diagnosis, Scan compression, IEEE 1500, MBIST/LBIST.
• Experience with main EDA providers: Synopsys DFT Compiler, Tetramax, VCS, Tessent and Modus/Encounter tool suite.
• Proficiency in RTL simulation, synthesis, Linting, CDC and RDC checks, STA, DFT and quality metrics.
• Hands-on scripting in Perl/Tcl/Python.

Responsibilities

• Implement and verify DFT solutions across complex digital designs to ensure high test coverage.
• Perform block- and top-level DFT insertion and pattern validation.
• Develop, validate, and optimize ATPG patterns for test efficiency and fault coverage.
• Collaborate with Physical Design and STA teams to address timing constraints.
• Support silicon bring-up, failure analysis, and issue diagnosis across designs.
• Contribute to reviews and continuous improvement of DFT flows and automation.

Skills

DFT techniques

JTAG

ATPG

MBIST LBIST

RTL simulation

Synthesis

Python scripting

Education

Bachelors/Masters in EE/CE

Tools

Synopsys DFT Compiler

Tetramax

VCS

Tessent

Modus/Encounter

Job description

CAPGEMINI ENGINEERINGAt Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same.YOUR ROLEAs a Senior DFT Engineer, you will be responsible for implementing and verifying Design-for-Test solutions across complex digital designs, ensuring high test coverage, efficient patterns, and robust silicon testability.In this role, you will:Perform DFT implementation in line with established test methodologies for advanced process nodes.Execute block-level and top-level DFT insertion, including scan compression, (i)JTAG, ATPG, pattern validation and simulation, MBIST, and LBIST.Develop and validate ATPG patterns, driving improvements in test coverage and pattern efficiency.Verify DFT circuitry and interfaces with other blocks and IPs, identifying and debugging simulation and timing issues.Collaborate closely with Physical Design and STA teams to address DFT-related timing constraints and support timing closure.Perform hierarchical test implementation and retargeting across complex SoC designs.Debug and optimize key DFT quality metrics, including fault coverage and pattern efficiency.Support silicon bring-up, diagnosis, and physical failure analysis, contributing to the identification and resolution of test-related issues.Participate in technical reviews and contribute to the continuous improvement of DFT methodologies, flows, and automation.YOUR PROFILEBachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.6+ years of hands-on experience with DFT and test flows with commercial EDA tools for large and complex SOCs.Strong fundamental knowledge of DFT techniques including JTAG, ATPG, yield learning, logic diagnosis, Scan compression, IEEE 1500 Std. and MBIST/LBIST.Experience with one of the main EDAs providers: Synopsys DFT Complier, Tetramax, VCS, Tessent and Modus/Encounter tool suite.Experience in RTL simulation, synthesis, Linting, CDC and RDC checks, STA, DFT, quality metrics is a plus.Hands-on in Perl/Tcl/Python scripting.Good command of English, both written and spoken.Strong problem-solving skills and attention to detail.Excellent communication skills and ability to work effectively in multicultural and multidisciplinary environments.WHAT YOU’LL LOVE ABOUT WORKING HEREJoin a multicultural and inclusive team environment.Enjoy a supportive atmosphere promoting work life balance.Hybrid work.Your career growth is central to our mission. Our array of career growth programs and diverse professionals are crafted to support you in exploring a world of opportunities.Access valuable training and certifications in cutting edge technologies.Engage in exciting national and international projects.Health and life insurance.Referral program with bonuses for talent recommendations.Great office locations.ABOUT CAPGEMINICapgemini is the business transformation partner for enterprises in the age of AI. We help organizations imagine and build an intelligent, sustainable future, combining AI, technology and human ingenuity to transform how they operate, innovate and grow. With unique end-to-end capabilities spanning strategy, technology, engineering and intelligent operations, we bring together deep industry expertise and market-leading capabilities in AI, cloud and data to turn ambition into measurable business outcomes at scale. Supported by a robust ecosystem of partners and nearly 60 years of expertise, Capgemini is a responsible and diverse global organization of over 410,000 team members in more than 50 countries.