RISC-V Safety & Fault-Tolerance Researcher

UNIVERSIDAD POLITECNICA DE MADRID; España; Sur place; EUR 23 000 - 29 000; Plein temps

Résumé du poste

UNIVERSIDAD POLITECNICA DE MADRID invites applications for a First Stage Researcher (R1) in the Engineering field. The project focuses on fault-tolerant and real-time concepts for RISC-V, including safety islands and physical design for safety-critical cores.

The ideal candidate holds a Master’s degree in Electrical/Electronics Engineering or Computer Science and demonstrates proficiency in Verilog/VHDL, RISC-V, and C/C++.

Qualifications

• Master degree in Electrical and Electronics Engineering or equivalent.
• Master degree in Computer Science, Telecommunication, or related field.

Responsabilités

• Research in fault tolerance and safety mechanisms for RISC-V.
• Research and develop concepts related to safety island and real time for RISC-V.
• Physical design for RISC-V cores with safety-critical requirements.

Connaissances

HDL design (Verilog/VHDL)

RISC-V

C/C++

Formation

Master's degree in Electrical and Electronics Engineering

Master's degree in Computer Science / Telecommunication / Computer Engineering

Description du poste

UNIVERSIDAD POLITECNICA DE MADRID invites applications for a First Stage Researcher (R1) in the Engineering field. The project focuses on fault-tolerant and real-time concepts for RISC-V, including safety islands and physical design for safety-critical cores.

The ideal candidate holds a Master’s degree in Electrical/Electronics Engineering or Computer Science and demonstrates proficiency in Verilog/VHDL, RISC-V, and C/C++.