HRS2026/460-372 Investigador / Researcher

UNIVERSIDAD POLITECNICA DE MADRID; España; On-site; EUR 23,000 - 29,000; Full time

Benefits offered by this job

Full social benefits in Spain

Conference/summer school/workshop fees

Job summary

UNIVERSIDAD POLITECNICA DE MADRID invites applications for a First Stage Researcher (R1) position at CEIMM, ETSII Madrid, focused on fault tolerance and safety for RISC-V architectures. The role blends research and design under the Horizon Europe framework in a permanent, full-time capacity.

The candidate should hold a Master degree in Electrical/Electronics or Computer Science/Engineering, with experience in C/C++, HDLs, and embedded systems. English and Spanish proficiency are required.

Qualifications

• Master degree in Electrical and Electronics Engineering, Telecommunication, Computer Engineering, or Computer Science.
• Embedded systems programming with C/C++ is expected.
• HDLs (Verilog or VHDL) and RISC‑V ISA knowledge are desirable.

Responsibilities

• Research in fault tolerance and safety mechanisms for RISC-V.
• Research and develop concepts related to safety island and real time for RISC-V.
• Physical design for RISC-V cores with safety-critical requirements.

Skills

C/C++ programming

HDL (Verilog/VHDL)

RISC-V

Embedded systems

Fault tolerance

Education

Master degree in Electrical & Electronics Engineering

Master degree in Computer Science/Engineering

Job description

Organisation/Company UNIVERSIDAD POLITECNICA DE MADRID Department HRS4R Research Field Engineering Electronic engineering Researcher Profile First Stage Researcher (R1) Positions Master Positions Application Deadline 16 Nov 2026 - 23:00 (Europe/Madrid) Country Spain Type of Contract Permanent Job Status Full-time Hours Per Week 37,5 Offer Starting Date 30 Oct 2026 Is the job funded through the EU Research Framework Programme? Horizon Europe Is the Job related to staff position within a Research Infrastructure? No

Offer Description

• Research in fault tolerance and safety mechanisms for RISC-V.
• Research and develop concepts related to safety island and real time for RISC-V
• Physical design for RISC-V cores with safety-critical requirements.

Where to apply

E-mail [e-mail]

Requirements

Research Field Engineering Education Level Master Degree or equivalent

Research Field Computer science Education Level Master Degree or equivalent

Skills/Qualifications

Master degree on Electrical and Electronics Engineering, Telecommunication, Computer Engineering, Computer Science, or similar. Exceptional candidates who have completed a bachelor passed all master's subjects, and are only pending the defense of their master's thesis will also be considered.

Specific Requirements

• Competence on computer architectures and digital system design with HDLs (Verilog or VHDL).
• Notion on RISC-V ISA and the integration of custom accelerators. Embedded systems programming with C/C++
• Desirable knowledge on fault-tolerance in electronic systems.

Languages ENGLISH Level Excellent

Languages SPANISH Level Excellent

Research Field Engineering Electronic engineering Years of Research Experience 1 - 4

Additional Information

The contract includes a gross salary of 25933,05 €, and full social benefits in Spain. The salary level is competitive for the current situation in Madrid. Conference, summer school and workshop registration fees will be also covered

Selection process

The following selection criteria will be considered:

• Adaptation of the educational level: 25%
• Experience in the field of the proposed tasks: 25%
• Adequacy to the specific requirements: 25%
• Experience in Research and Motivation: 25%

Additional comments

Work Location(s)

Number of offers available 1 Company/Institute Centro de Electrónica Industrial y Sistemas Multimodales (CEIMM), Sede ETSII Country Spain State/Province Madrid City Madrid Postal Code 28006 Geofield