Senior Digital Design Engineer

European Tech Recruit; Aachen; Hybrid; EUR 60.000 - 90.000; Vollzeit

Benefits dieser Stelle

Competitive salary

Equity (VESOP)

Flexible work location

Open team culture

Zusammenfassung

Join a dynamic semiconductor start-up in Aachen as a Digital Design Engineer, focusing on cutting-edge projects in high-speed data communication. This role offers opportunities for both Mid and Senior-Level engineers to engage in RTL design, backend implementation, and team leadership in a collaborative, innovative environment. You'll work on next-generation data converter ICs with a highly competitive salary package and benefits.

Qualifikationen

• 3-5 years for Mid-Level, 6+ years for Senior-Level.
• Experience with modern process nodes (22FDX, 16/12nm FinFET).
• Good understanding of DFT concepts is a plus.

Aufgaben

• Own RTL design and micro-architecture of digital subsystems.
• Develop and optimize backend flow for placement and routing.
• Support the integration of digital blocks with analog subsystems.

Kenntnisse

RTL design

SystemVerilog

VHDL

digital verification

scripting

EDA tools

low-power design techniques

physical implementation

mixed-signal integration

problem-solving skills

Ausbildung

MSc in Electrical Engineering

PhD in Microelectronics

Tools

Cadence

Synopsys

Mentor Graphics

Jobbeschreibung

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Senior Recruitment Consultant | Software Engineering, Embedded Computing, Semiconductor, AI & ML

Digital Design Engineer (Frontend & Backend) | Deep Tech Semiconductor Start-up | Hybrid in Aachen

A deep tech semiconductor start-up redefining high-speed data communication is looking to grow its team with a Mid-level & Senior Design Engineer in Aachen.

We're looking for versatile Digital Design Engineers with strong expertise in either frontend RTL design, backend physical implementation, or ideally both. You'll contribute to the development of high-performance digital and mixed-signal ICs in advanced technology nodes such as 22FDX and other FinFET/FD-SOI processes. We're hiring for both Mid-Level and Senior-Level roles, depending on your experience and leadership capabilities.

Responsibilities:

• Own RTL design and micro-architecture of digital subsystems (e.g., DSP blocks, control logic, interfaces).
• Develop and optimize backend flow, including synthesis, floorplanning, placement and routing (P&R), timing closure, and signoff (STA, LVS, DRC).
• Perform logic synthesis and work closely with physical design teams to ensure a clean handoff and alignment across digital and mixed-signal boundaries.
• Support the integration of digital blocks with analog/mixed-signal subsystems.
• Generate documentation, testbenches, and support post-silicon bring-up and debugging.
• (For Senior-level candidates) Lead block-level architecture, mentor junior designers, and guide design methodology decisions.

Your Profile:

• Strong proficiency in RTL design using SystemVerilog/VHDL, digital verification, and scripting (Python, Tcl, etc.).
• Experience with EDA tools from Cadence, Synopsys, or Mentor for logic synthesis, static timing analysis, and backend implementation.
• Familiarity with low-power design techniques, clock domain crossing (CDC), and hierarchical SoC design.
• Hands-on experience in physical implementation (floorplanning, P&R, CTS, STA, DRC, LVS).
• Experience with modern process nodes, especially 22FDX, 16/12nm FinFET, or similar.
• Good understanding of mixed-signal integration, top-level assembly, and testability concepts (DFT is a plus).
• Strong problem-solving skills, attention to detail, and the ability to work independently.

Qualifications:

• Mid-Level: 3–5 years of relevant experience in digital IC design.
• Senior-Level: 6+ years, with ownership of IP/SoC blocks or backend flows.
• MSc or PhD in Electrical Engineering, Microelectronics, or a related field.

What We Offer:

• A highly technical and impactful role in a fast-growing semiconductor startup.
• Opportunity to work on next-generation data converter ICs and wireless communication systems.
• Competitive salary, equity (VESOP), and benefits.
• An open, international team culture that values innovation and ownership.
• Flexibility in work location and a focus on real results.

Interested? Apply directly through LinkedIn, or send your CV to [e-mail]

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Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Information Technology, Engineering, and Research

• Industries

  Semiconductor Manufacturing, Appliances, Electrical, and Electronics Manufacturing, and Computers and Electronics Manufacturing

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