Senior Digital ASIC Design Engineer (m/f/d)

advantestcareers; Böblingen; Vor Ort; EUR 70.000 - 110.000; Vollzeit

Zusammenfassung

Advantest is seeking a Digital ASIC Design Engineer to transform abstract concepts into silicon-ready digital modules. You will own architecture development, RTL coding in Verilog, and verification across module and chip levels, coordinating with system architects and software teams to ensure robust, scalable designs.

You will document implementations, support floor-planning, and work within a multidisciplinary engineering environment, delivering high-quality results on schedule.

Qualifikationen

• University degree in EE or equivalent required.
• Experience with SOC/ASIC design workflows and silicon development cycle.
• Proficiency in RTL coding (Verilog) and using standard digital design tools.

Aufgaben

• Requirements gathering for IP and architecture development.
• Design and RTL coding of digital modules and full-custom blocks.
• Verification at module and chip level with test plans and cases.
• Documentation of functionality and interfaces.
• Support for floor-planning and physical design coordination.
• Collaborate with system architects, software and other engineering teams.

Kenntnisse

Digital design

RTL coding (Verilog)

Simulation tools

Unix/Linux

Technical communication

Teamwork

English language skills

Ausbildung

Bachelor/University degree in EE

Tools

Verilog simulators

Linux environment

Jobbeschreibung

Join a global, highly skilled engineering team at the heart of Advantest’s cutting edge IC test solutions. As a Digital ASIC Design Engineer, you will help create the key technologies that enable the next generation of semiconductor testing.

You will work on complex mixed signal ASICs used in Advantest’s industry leading testers, taking digital modules and subsystems from first concept all the way to silicon in the final system, giving you true end to end ownership.

In this role, you will collaborate closely with system architects, software engineers, product marketing, and other engineering disciplines. You will translate requirements into robust designs, solve challenging technical problems, and deliver high quality results on schedule and at scale.

Job Duties & Responsibilities

• Requirements gathering and elicitation for IP
• Architecture development for CMOS IP designs
• Design and RTL coding of digital and full-custom modules
• Verification on module and chip level including test plan/cases generation.
• Documentation of implemented functionality
• Support for floor-planning and physical design
• Collaboration with other functions

Qualifications & Experience

• University degree, Diploma or BS EE
• Background in digital design (SOC), Application Specific Integrated Circuit (ASIC) design methodologies and silicon development cycle
• Experience in Register Transfer Level (RTL) coding (Verilog)
• Experience with standard simulation tools for digital designs
• Basic knowledge about UNIX* or Linux* environment and using programming languages
• Technical communication, team work and problem solving skills
• English language skills