Expert Digital ASIC Design Engineer (m/f/d)

advantestcareers; Böblingen; Vor Ort; EUR 90.000 - 130.000; Vollzeit

Zusammenfassung

Advantest in Böblingen, Germany seeks an Expert Digital ASIC Design Engineer to own end-to-end digital modules from concept to silicon in our high‑performance test systems.

You will collaborate with system architects, software teams and product marketing, mentor junior engineers, and deliver robust RTL, verification plans and clear documentation on schedule and at scale.

Qualifikationen

• University degree, Diploma or BS EE.
• Expert background in digital design (SOC), ASIC design methodologies and silicon development cycle.
• RTL coding experience with Verilog.
• Experience with standard simulation tools for digital designs.
• Basic knowledge of UNIX/Linux and programming languages.
• Strong technical communication, teamwork and problem solving.

Aufgaben

• Requirements gathering and elicitation for devices and IP.
• Architecture development for CMOS designs.
• Design and RTL coding of digital and full-custom modules.
• Verification on module and chip level including test plan/cases generation.
• Documentation of architecture and implemented functionality.
• Support for floor-planning and physical design.
• Mentoring Junior Engineers.
• Collaboration with other functions.

Kenntnisse

RTL coding

Verification

Documentation

Mentoring

Team collaboration

English proficiency

Ausbildung

University degree, Diploma or BS EE

Tools

Verilog

Simulation tools

Unix/Linux

Jobbeschreibung

Join a global, highly skilled engineering team at the heart of Advantest’s cutting edge IC test solutions. As an Expert Digital ASIC Design Engineer, you will help create the key technologies that enable the next generation of semiconductor testing. You will work on complex mixed signal ASICs used in Advantest’s industry leading testers, taking digital modules and subsystems from first concept all the way to silicon in the final system, giving you true end to end ownership. In this role, you will collaborate closely with system architects, software engineers, product marketing, and other engineering disciplines. In addition, mentoring junior engineers is a must. You will translate requirements into robust architecture, refine designs, solve challenging technical problems, and deliver high quality results on schedule and at scale.

Job Duties & Responsibilities

• Requirements gathering and elicitation for devices and IP
• Architecture development for CMOS designs
• Design and RTL coding of digital and full-custom modules
• Verification on module and chip level including test plan/cases generation.
• Documentation of architecture and implemented functionality
• Support for floor-planning and physical design
• Mentoring Junior Engineers
• Collaboration with other functions

• University degree, Diploma or BS EE
• Expert background in digital design (SOC), ASIC design methodologies and silicon development cycle
• Experience in Register Transfer Level (RTL) coding (Verilog)
• Experience with standard simulation tools for digital designs
• Basic knowledge about UNIX* or Linux* environment and using programming languages
• Technical communication, team work and problem solving skills
• English language skills