PMU Analog Mixed-Signal Design Verification Engineer - Experienced (m/fd)

Apple Inc.; München; On-site; EUR 90,000 - 120,000; Full time

Job summary

Apple Inc. in Munich invites an AMS Verification Engineer to join the PMU team. You will verify next-generation PMUs, collaborating with design teams to enable tape-out and ensure high-quality silicon for ICs and IPs.

The role involves developing efficient verification test benches, modeling analog behavior with Verilog-AMS, and establishing robust verification strategies for scalable, portable IP validation across global teams. English proficiency and strong teamwork are essential.

Qualifications

• Bachelors, Masters or PhD in EE or related field, or equivalent work experience.
• Excellent communication and interpersonal skills, combined with the ability to collaborate with diverse teams and take on diverse challenges with international teams.
• Outstanding sense and drive for quality of deliverables.
• Fluent English skills.
• Ability to work well on a team, take ownership and motivate self and others.
• Familiar with mixed signal verification is a plus.
• Familiar with verification methodologies and tools: simulators, waveform viewers, execution automation, coverage collection, scalable/test cases.

Responsibilities

• Verify top level verification of PMUs in collaboration with design teams.
• Develop efficient verification test benches.
• Analyze and model analog behavior (Verilog-AMS).
• Verify pre-silicon subsystems in the top level environment with emphasis on Analog/Mixed Signal macros.
• Ensure specification compliance and correctness per the verification plan.
• Develop detailed test and coverage plans from IC specifications.
• Create scalable, portable verification methodology for the IP.
• Develop verification environment with stimuli, checkers, assertions, and coverage.
• Communicate status and results to multiple disciplines.
• Sign-off mixed signal designs in preparation for tape-out.

Skills

Fluent English

Communication

Interpersonal skills

Teamwork

Ownership

Education

Bachelor's degree in EE or related field

Master's degree in EE or related field

PhD in EE or related field

Tools

Verilog

SystemVerilog

Verilog-AMS

TCL

Python

PERL

SKILL

Job description

Summary

At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? As a member of our PMU team at our Munich office, you will have the great opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every day! We are looking for an AMS Verification Engineer who will enable us to verify our next generation of PMUs, in close collaboration with the design teams. You will become part of a hands-on development team that cultivates perfection, creativity and innovation. The responsibilities include contributing to the top level verification of our PMUs. A number of IP specific features as well as interaction between IPs will also be part of the expected verification scope.

Description

• In this role, you will take care of ensuring high quality silicon for IC chips and IPs. The workflow starts with careful review of specifications followed by crafting of a verification plan. Then the verification is executed according to plan to support tape-out.
• Develop efficient and sustainable state-of-the-art verification test benches.
• Analyse and model analog behavior (Verilog-AMS modeling).
• Verify pre-silicon sub-/systems in the top level environment, with main respect to Analog/Mixed Signal macros: regressions, failure debug and tape-out.
• Ensure specification compliance and correct functionality of attributes defined in the verification plan.
• Develop detailed test and coverage plans based on IC specifications.
• Develop verification methodology suitable for the IP, ensuring scalability and portability.
• Develop verification environment, including stimuli, checkers, assertions, and coverage.
• Have a collaborative approach to communicate status and results to multiple disciplines.
• Sign-off mixed signal designs in preparation for tape-out.

Minimum Qualifications

Bachelors, Masters or PhD in EE or related field, or equivalent work experience.Excellent communication and interpersonal skills, combined with the ability to collaborate with diverse teams and take on diverse challenges with international teams.Outstanding sense and drive for quality of deliverables.Ability to work well on a team, take ownership and motivate self and others.Fluent English skills.

Preferred Qualifications

• Advanced knowledge of mixed signal verification.
• Few years of experience in industry for production integrated circuits.
• Experience with developments in hardware descriptive languages: Verilog, System-Verilog, and/or Verilog-AMS code.
• A background that includes scripting or programming languages is preferred. These include, but are not limited to, TCL, Skill, Python, and/or PERL.
• Familiar with analog behavioural models.
• Familiar with verification methodologies and tools: simulators, waveform viewers, execution automation, coverage collection, experience developing scalable and portable test cases.
• Possess sufficient analog IC background to identify failure possibilities, work through first order debug, and analyse analog verification results.
• Knowledge of analog concurrent assertion and static analyses checks is a plus.
• Understanding of both power management and related auxiliary circuitry: switching converters, linear converters, reference circuitry, band-gaps, data converters, and clock generators.