IPU Packaging Expert

Inovance Automation; Stuttgart; Vor Ort; EUR 70.000 - 110.000; Vollzeit

Zusammenfassung

Inovance Automation in Stuttgart seeks an experienced Power Semiconductor Packaging Design Engineer to lead the development of next-generation power module solutions, spanning material selection, structural design, and multi-physics validation.

You will drive packaging process development and reliability assessment, perform electro-thermal-mechanical simulations, optimize module designs, and collaborate with R&D, suppliers, and cross-functional teams to deliver robust, high-performance power

Qualifikationen

• Master's degree or higher in Microelectronics/Power Electronics/ICs or related field.
• 5+ years of hands-on experience in semiconductor packaging design.
• Proficiency in packaging design software (PTC Creo, SolidWorks, CAD) and in thermal/structural simulations.
• Strong communication and cross-functional coordination skills.

Aufgaben

• Lead material selection, structural design, and multi-physics electro-thermal-mechanical analysis for power module packaging.
• Drive packaging process development and reliability assessment.
• Apply mechanical and thermal simulations to optimize designs and identify issues.
• Stay updated on industry trends and new design methodologies.
• Coordinate with R&D, suppliers, and cross-functional teams.

Kenntnisse

Cross-functional coordination

Stakeholder management

Communication skills

Ausbildung

Master's degree in Microelectronics/Power Electronics/ICs or related field

Tools

PTC Creo

SolidWorks

CAD

Jobbeschreibung

About the Role

We are seeking an experienced Power Semiconductor Packaging Design Engineer to lead the development of next-generation power module solutions. This role is central to our product innovation, spanning material selection, structural design, multi-physics simulation, and reliability validation.

Key Responsibilities

• Lead power semiconductor packaging material selection, structural design, and multi-dimensional electro-thermal-mechanical stress analysis; drive critical packaging process development and reliability assessment.
• Proficient in mechanical stress and thermal simulation throughout power module development; utilize simulation tools to optimize module design and rapidly identify technical issues.
• Stay abreast of industry trends, emerging packaging technologies, and new design methodologies.
• Expertise in packaging material selection and full process flow, including die attach, wire bonding, vacuum soldering, molding, vacuum potting, and testing.
• Facilitate internal and external technical communication during R&D phases, including cross-functional collaboration and supplier engagement.

Qualifications

• Master's degree or above in Microelectronics, Power Electronics, Integrated Circuits, or related Electrical/Electronic Engineering fields (exceptional candidates may be considered regardless of degree).
• 5+ years of hands‑on experience in semiconductor packaging design.
• Proficiency in packaging design software such as PTC Creo, SolidWorks, or CAD; demonstrated capability in thermal stress, structural, and mechanical stress simulation analysis.
• Excellent communication and interpersonal skills; proven experience in cross‑functional coordination and stakeholder management.