Digital Design Engineer

TSMC

München

Vor Ort

EUR 60.000 - 100.000

Vollzeit

14 Tage+

Erhalte mehr Antworten von Arbeitgebern

Versende in nur wenigen Minuten einen passgenauen Lebenslauf.

Zusammenfassung

Join a leading semiconductor foundry where you'll refine your technical and leadership skills in a cutting-edge design environment. This role focuses on developing and optimizing pre-silicon design flows for non-volatile memory solutions, including MRAM and RRAM. You'll work with a talented team to create internal test chips and contribute to innovative chip designs that significantly impact technology and everyday life. If you're passionate about semiconductor technology and eager to make a difference, this opportunity is perfect for you.

Qualifikationen

  • Master's degree in Electrical Engineering or related field required.
  • 5+ years of experience in non-volatile memory design.

Aufgaben

  • Develop and optimize pre-silicon design flow for non-volatile memory.
  • Implement micro-architecture and verification plans using Verilog/SystemVerilog.

Kenntnisse

Verilog
SystemVerilog
EDA Tools
Python
C/C++

Ausbildung

Master's degree in Electrical Engineering

Tools

Design Compiler
Cadence Tools

Jobbeschreibung

Taiwan Semiconductor Manufacturing Company Ltd. (“TSMC”) is the world’s leading semiconductor foundry. Headquartered in Taiwan, the Company has operation facilities worldwide and the largest logic chip manufacturing capacity in the global semiconductor industry. The Company employs a global workforce of over 82,000 and recorded revenue over US$90 billion in 2024. TSMC produces the chips that are found in smartphones, tablets, computers, smart TVs, cars, laptops, game consoles, data centers, and many more applications. TSMC sells to a wide variety of customers, including most leading semiconductor companies.

At the TSMC EU Design Center, you’ll work in an exceptional technology and design team to refine your technical and leadership skills within the world's most advanced design service ecosystem. You'll be contributing to the forefront of semiconductor technology, including cutting-edge nonvolatile memory solutions like MRAM and RRAM. Your main focus will be to assist our leading customers in delivering state-of-the-art products that have a transformative impact on people's lives.

Your work will enable chip innovation by developing and optimizing all aspects of the pre-silicon design flow, including:

  • Develop internal test chips as TSMC design-process co-optimization vehicles
  • Develop MRAM/RRAM macros and compilers as the foundation IP of TSMC process

Responsibilities for developing embedded nonvolatile memory test chip and IP include:

  1. Micro-architecture: Given an architecture and requirements from circuit design team and product engineering team, write design specification and micro-architecture specification of how to implement the spec.
  2. RTL Implementation: Implement the micro-architecture defined above by using synthesizable Verilog or SystemVerilog according to some coding guidelines.
  3. Verification: Plan, document, and implement verification plan using Verilog, SystemVerilog, and preferably UVM.
  4. EDA Tool/Implementation: Utilize at least one linting tool, collaborate with the P&R team to specify SDC for synthesis and P&R, and perform logic synthesis (design compiler or Cadence’s), LEC (Logic Equivalency Checking) and STA analysis.
  5. Automation: (Optional but advantageous) Identify design and design flow problems to be automated, specify and document the input spec and automation program/utility, write program/scripts to implement the automation by Python, C/C++ or some other common scripting languages.

Job Qualifications:

  1. Master's degree or above in Electrical Engineering or any related majors.
  2. More than 5 years of non-volatile memory (flash memory, RRAM, MRAM, PCRAM) circuit or logic design experience.
  3. Familiar with EDA tools and design methodology for custom design or digital design of non-volatile memory.

It is the policy of TSMC EU to provide equal employment opportunity (EEO) to all persons regardless of age, color, ethnic and national origin, citizenship status, physical or mental disability, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, genetic information, marital status, status with regard to public assistance, veteran status, or any other characteristic protected by applicable law.

Seniority level

Mid-Senior level

Employment type

Full-time

Job function

Industries

Semiconductor Manufacturing

Hol dir deinen kostenlosen, vertraulichen Lebenslauf-Check.
oder ziehe deine Datei hierhin.
Similar jobs

Ähnliche Jobs, die dir auch gefallen könnten

Digital Design Lead
Digital Design Lead

TSMC • München

Vor Ort
EUR 68.604 - 102.907
Custom Memory Design Engineer
Custom Memory Design Engineer

TSMC • München

Vor Ort
EUR 60.000 - 80.000
Custom Memory Design Manager
Custom Memory Design Manager

TSMC • München

Vor Ort
EUR 120.000 - 180.000
AI Memory Design Engineer
AI Memory Design Engineer

TSMC • München

Vor Ort
EUR 90.000 - 130.000
IP Methodology & Design Flow Engineer
IP Methodology & Design Flow Engineer

TSMC • München

Vor Ort
EUR 100.000 - 180.000
Office Administrator
Office Administrator

TSMC • München

Vor Ort
EUR 65.000 - 90.000
Digital Design Engineer
Digital Design Engineer

TSMC - Taiwan Semiconductor Manufacturing Company Limited • München

Vor Ort
EUR 70.000 - 90.000
AI System Architect Manager
AI System Architect Manager

TSMC • München

Vor Ort
EUR 120.000 - 180.000
AI Memory Design Engineer
AI Memory Design Engineer

TSMC - Taiwan Semiconductor Manufacturing Company Limited • München

Vor Ort
EUR 70.000 - 90.000
Custom Memory Design Manager
Custom Memory Design Manager

TSMC - Taiwan Semiconductor Manufacturing Company Limited • München

Vor Ort
EUR 80.000 - 120.000