Staff Digital Design Engineer — Lead Digital IC Architect

Semtech; Neuenburg; On-site; CHF 140,000 - 190,000; Full time

Job summary

Semtech’s Wireless and LoRa system teams in Neuchâtel are seeking a Staff Digital Design Engineer to lead digital subsystem design in mixed-signal ICs, from concept to lab validation.

You will define digital architectures, implement high-performance, low-power designs, and collaborate across design, verification, and product teams to ensure production readiness. Requires 8+ years in digital IC design and strong SystemVerilog/Verilog/VHDL skills.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 8+ years of experience in digital IC design, preferably within mixed-signal environments.
• Strong knowledge of digital IC development, including frontend-to-backend flow, timing closure, and low-power design techniques.
• Experience with MCU-based architectures (e.g. ARM, RISC-V, STM32) and digital microarchitecture.
• Proficiency in SystemVerilog, Verilog, or VHDL, along with scripting languages such as Python, Tcl, or Perl.
• Experience with industry-standard EDA tools (e.g. Synopsys, Cadence, Siemens).
• Understanding of verification methodologies (e.g. UVM/OVM, formal verification).
• Familiarity with standard hardware interfaces (e.g. I2C, I3C, SPI, MIPI).
• Strong analytical, problem-solving, and communication skills.
• Ability to work independently while collaborating effectively within cross-functional teams.

Responsibilities

• Design and implement digital subsystems, including CPU-based architectures, FSMs, interconnects, and peripherals (e.g. I2C, SPI, analog controls) (40%)
• Define and architect digital system blocks, contributing to system-level design decisions and trade-offs (10%)
• Collaborate with analog design teams to define interfaces and ensure seamless mixed-signal integration (10%)
• Debug and analyse RTL and verification issues, identifying root causes and driving resolution (10%)
• Support block-level and chip-level verification activities in collaboration with verification teams (10%)
• Contribute to lab validation, product qualification, and cross-functional engineering efforts with Validation, Test, and Product teams (10%)
• Drive continuous improvement of design methodologies, tools, and overall design quality (10%)

Skills

Digital IC design

MCU architectures (ARM, RISC-V, STM32)

SystemVerilog/Verilog/VHDL

Python/Tcl/Perl scripting

EDA tools: Synopsys, Cadence, Siemens

Verification methodologies: UVM/OVM,  

I2C/I3C/SPI/MIPI interfaces

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field

Tools

Synopsys

Cadence

Siemens

FPGA design tools

Git

Job description

Semtech’s Wireless and LoRa system teams in Neuchâtel are seeking a Staff Digital Design Engineer to lead digital subsystem design in mixed-signal ICs, from concept to lab validation.

You will define digital architectures, implement high-performance, low-power designs, and collaborate across design, verification, and product teams to ensure production readiness. Requires 8+ years in digital IC design and strong SystemVerilog/Verilog/VHDL skills.