R&D Analog IC Design Engineer

IC Resources; Lausanne; Vor Ort; CHF 120.000 - 180.000; Vollzeit

Zusammenfassung

IC Resources is seeking an R&D Analog IC Design Engineer to join the Advanced R&D team in Switzerland. You will develop new circuit concepts and tackle challenging high-speed semiconductor design problems from concept through verification and silicon bring-up.

This research-focused role targets engineers with 5+ years in analog or mixed-signal IC design, strong high-speed experience (SerDes, PLLs, ADCs/DACs) and a PhD or MSc in EE, with Cadence Virtuoso/Spectre or HSpice expertise.

Qualifikationen

• 5+ years of analog or mixed-signal IC design experience.
• Strong high-speed design experience, e.g. SerDes, transceivers, PLLs, CDRs, ADCs or DACs.
• Experience in advanced semiconductor nodes (e.g. FinFET 16nm/14nm/7nm).
• MSc or PhD in Electrical Engineering or related field.
• Experience with Cadence Virtuoso and Spectre or HSpice, including parasitic extraction.

Aufgaben

• Research and develop new analog and mixed-signal circuit concepts for high-speed applications.
• Explore architectures to solve challenging circuit and system-level problems.
• Design and verify high-speed, high-precision circuits using advanced semiconductor technologies.
• Develop circuit specifications, models and simulation environments.
• Perform pre-layout and post-layout verification including variation analysis.
• Collaborate with architects, modelling engineers, layout engineers and system designers.
• Support lab bring-up, silicon debugging and circuit characterization.
• Produce technical analyses and documentation for new concepts and verification.

Kenntnisse

High-speed design

SerDes

Transceivers

PLLs

CDRs

ADCs

DACs

Analog/mixed-signal design

Modelling & simulation

Ausbildung

MSc/PhD in Electrical Engineering

Tools

Cadence Virtuoso

Spectre

HSpice

Parasitic extraction

Jobbeschreibung

I am exclusively recruiting for an R&D Analog IC Design Engineer to join my client’s Advanced R&D team in Switzerland. This is a research-focused position for an engineer who enjoys developing new circuit concepts and solving challenging problems in high-speed semiconductor design.

The role will involve working on advanced analog and mixed-signal circuits, with significant involvement from early research and architecture through to circuit design, verification and silicon bring-up.

Responsibilities:

• Researching and developing new analog and mixed-signal circuit concepts for high-speed applications
• Exploring new architectures and approaches to solve complex circuit and system-level challenges
• Designing and verifying high-speed and high-precision circuits using advanced semiconductor technologies
• Developing circuit specifications, models and simulation environments
• Performing pre-layout and post-layout verification, including variation aware analysis
• Working closely with architects, modelling engineers, layout engineers and system designers
• Supporting lab bring-up, silicon debugging and circuit characterisation
• Producing technical analysis and documentation around new concepts, modelling, design and verification

Background:

• 5+ years of analog or mixed-signal IC design experience
• Strong high speed design experience, ideally with SerDes, transceivers, PLLs, CDRs, ADCs, DACs or related circuits
• Experience designing in advanced semiconductor nodes, particularly FinFET technologies such as 16nm, 14nm or 7nm
• Experience developing new circuit concepts rather than working purely within established design methodologies
• Strong understanding of modelling, simulation, signal integrity, signal processing or communications
• MSc or PhD in Electrical Engineering, Electronic Engineering or a related subject
• Experience with Cadence Virtuoso and Spectre or HSpice, with knowledge of physical verification and parasitic extraction

This position is particularly suited to someone who enjoys research and innovation. My client is looking for an engineer who can take a technical problem, investigate different approaches and turn new ideas into practical circuit concepts.

You will be expected to spend a minimum of 3 days per week on-site in Switzerland.