RF IC Design Engineer — High-Performance MMICs

Destinus; Zürich; On-site; CHF 120,000 - 190,000; Full time

Job summary

Destinus is seeking an RF IC Design Engineer to own the design, simulation and validation of high-performance RF/MMIC solutions. You will work across schematic, layout, and EM simulations, collaborating with foundries and industrial partners to deliver robust hardware.

You will bring PhD or Master’s level expertise, strong RF fundamentals, and hands-on measurement experience to drive the complete RF/MMIC design flow from concept to characterization.

Qualifications

• PhD in Electrical Engineering or Master's with at least 4 years of RF IC design experience.
• Strong RF fundamentals and design skills across analog/digital domains.
• Hands-on experience with EM simulations and RF measurement techniques.

Responsibilities

• Design and develop RF ICs using III-V and CMOS/SOI technologies.
• Lead schematic design, layout optimization, and EM simulations.
• Characterize and validate RF performance through simulations and measurements.
• Collaborate with foundries, design houses, and external partners.
• Prepare technical documentation and progress reports.
• Coordinate projects with internal teams and external partners.

Skills

RF fundamentals

Analog/Digital design

EM simulations

Schematic/layout

HFSS/Momentum

ADS/AWR/Virtuoso

PCB design basics (Altium)

RF measurements

Project coordination

Education

PhD in Electrical Engineering

Master's in Electrical Engineering

Tools

HFSS

Momentum

ADS

AWR

Cadence Virtuoso

Altium Designer

Job description

Destinus is seeking an RF IC Design Engineer to own the design, simulation and validation of high-performance RF/MMIC solutions. You will work across schematic, layout, and EM simulations, collaborating with foundries and industrial partners to deliver robust hardware.

You will bring PhD or Master’s level expertise, strong RF fundamentals, and hands-on measurement experience to drive the complete RF/MMIC design flow from concept to characterization.