Remote ASIC Verification Team Lead (UVM Expert)

Swediumglobal; Le Chalet-à-Marin; Hybrid; CHF 110,710 - 147,614; Full time

Job summary

A leading system engineering and solutions company is looking for an experienced ASIC Verification Team Lead. The role involves leading and managing ASIC verification teams across multiple locations, defining verification strategies, and ensuring high-quality silicon delivery. The ideal candidate will have over 15 years of experience in ASIC/SoC verification, strong expertise in SystemVerilog and UVM methodology, and excellent communication skills. Ability to mentor engineers and drive projects independently is crucial for success in this role.

Qualifications

• 15+ years of experience in ASIC/SoC Verification.
• Strong expertise in SystemVerilog and UVM methodology.
• Proven experience in building verification environments from scratch.

Responsibilities

• Lead and manage ASIC Design Verification teams across multiple geographical locations.
• Define and drive verification strategy for complex SoC/ASIC projects.
• Mentor and technically guide engineers to enhance team capability.

Skills

ASIC/SoC Verification

SystemVerilog

UVM methodology

testbench architecture

communication

stakeholder management

people management

Tools

Cadence

Synopsys

Mentor Graphics

Job description

A leading system engineering and solutions company is looking for an experienced ASIC Verification Team Lead. The role involves leading and managing ASIC verification teams across multiple locations, defining verification strategies, and ensuring high-quality silicon delivery. The ideal candidate will have over 15 years of experience in ASIC/SoC verification, strong expertise in SystemVerilog and UVM methodology, and excellent communication skills. Ability to mentor engineers and drive projects independently is crucial for success in this role.