Lead ASIC Engineer: High-Performance Subsystems

Cisco

Thalwil

Vor Ort

CHF 140.000 - 210.000

Vollzeit

14 Tage+

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Zusammenfassung

Cisco's IP&COT team in Thalwil, Switzerland, is driving cutting-edge ASIC technologies powering next-generation platforms. We seek an ASIC Engineering Technical Leader to define, design, and verify high-performance subsystems and to lead architecture of analog and mixed-signal circuits.

You will collaborate with cross-functional teams to ensure power, performance, and area goals are met, influence packaging and hardware requirements, and advance verification strategies.

Qualifikationen

  • Minimum: Bachelors + 12 years, Masters + 8 years, or PhD + 5 years in related field.
  • Extensive CMOS high-frequency design experience including analog and mixed-signal circuits.
  • Proficiency with Cadence Virtuoso including layout, DRC, LVS, parasitic extraction.
  • Strong programming skills in Skill, VerilogA, Tcl, Perl, Python, Matlab, or C.

Aufgaben

  • Define, design, and verify high-performance ASIC subsystems.
  • Oversee architecture of analog and mixed-signal circuits and verify.
  • Collaborate with cross-functional teams on packaging and hardware requirements.
  • Develop reusable code methodologies and advanced digital design flows.

Kenntnisse

High-frequency CMOS design
Analog & mixed-signal design
Cadence Virtuoso
Programming languages (Skill/VerilogA2

Ausbildung

Bachelor's degree + 12 years
Master's degree + 8 years
PhD + 5 years

Tools

Cadence Virtuoso CAD
Siemens/Mentor
Synopsys
EM field simulators (EMX Momentum HFSS)

Jobbeschreibung

Cisco's IP&COT team in Thalwil, Switzerland, is driving cutting-edge ASIC technologies powering next-generation platforms. We seek an ASIC Engineering Technical Leader to define, design, and verify high-performance subsystems and to lead architecture of analog and mixed-signal circuits.

You will collaborate with cross-functional teams to ensure power, performance, and area goals are met, influence packaging and hardware requirements, and advance verification strategies.

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