SoC Design Engineer (Verilog, Low-Power ASICs) – RSU/Equity

Qualcomm; Markham; On-site; CAD 130,000 - 180,000; Full time

Benefits offered by this job

Discretionary bonus

RSU grants

Competitive benefits package

Job summary

Qualcomm Canada ULC is seeking an ASIC Engineer to define, implement and optimize digital/analog IP for high‑performance, low‑power SoCs. You will design RTL, verify and validate across architecture and micro architecture while coordinating with multi‑site teams in the US and India.

You will work on VLSI development cycles, interact with PD, DFT, and verification teams, and contribute to design convergence using industry tools and standards in a fast‑paced environment.

Qualifications

• Bachelor's or advanced degree with relevant ASIC experience
• 4+ years for Bachelor's, 3+ for Master's, 2+ for PhD in ASIC/verification/validation
• Experience across RTL to GDS flow and cross‑site coordination

Responsibilities

• Digital design and RTL development for ASICs
• Develop microarchitecture and implement with Verilog/SV
• Collaborate with Systems, Verification, SoC, SW, PD, DFT teams
• Analyze reports and run tools like Spyglass, CDC checks, synthesis and simulation

Skills

Digital front end design

RTL debugging

Cross-functional collaboration

Verilog/VHDL/SV

Power/clock domain management

Scripting with Perl/TCL

Education

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Tools

Verilog

VHDL

SV

UPF

Spyglass

DC-Compiler

PrimeTime

Cadence LEC

GDS II

Perl

TCL

Job description

Qualcomm Canada ULC is seeking an ASIC Engineer to define, implement and optimize digital/analog IP for high‑performance, low‑power SoCs. You will design RTL, verify and validate across architecture and micro architecture while coordinating with multi‑site teams in the US and India.

You will work on VLSI development cycles, interact with PD, DFT, and verification teams, and contribute to design convergence using industry tools and standards in a fast‑paced environment.