Senior SoC Design Engineer - RTL/Verilog for High-Perf

FHLB Des Moines; Burnaby; On-site; CAD 86,000 - 186,000; Full time

Benefits offered by this job

Health benefits from day one

Retirement savings plans

IESPP program with 6-month look back

Job summary

Microchip Technology Inc. in Burnaby, BC, Canada, is seeking a Senior Engineer I-Design to contribute to its Data Center Solutions unit. You will work on SAS/PCIe/NVMe/CXL products, connect and secure information, and collaborate across teams in a fast-paced environment.

You will design complex digital ICs, participate in verification flows, and engage with architects to justify trade-offs while advancing the industry’s technology leadership.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering or Computer Engineering or equivalent.
• 3 to 5 years related experience.
• RTL Design experience with SystemVerilog/Verilog.
• Familiarity with complex ASIC design flows and verification.
• Knowledge of PCIe/AHB/AXI is a plus.

Responsibilities

• Design complex digital ICs at block/subsystem level (100K–50M+ gates) using Verilog/SystemVerilog.
• Define subsystem feature sets and document design/implementation details.
• Support emulation, ASIC lab validation and debugging.
• Coordinate with distributed design/verification teams to resolve issues.
• Understand storage and computer interface protocol standards.

Skills

RTL Design

SystemVerilog

Verilog

ASIC design flows

Formal Verification

Scripting (Python Perl Bash)

Debugging

Team Collaboration

English communication

Time management

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Synopsys Design Compiler

Cadence Incisive

Waveform Viewers

Python

Perl

Tcl

PCIe

AHB/AXI protocols

Job description

Microchip Technology Inc. in Burnaby, BC, Canada, is seeking a Senior Engineer I-Design to contribute to its Data Center Solutions unit. You will work on SAS/PCIe/NVMe/CXL products, connect and secure information, and collaborate across teams in a fast-paced environment.

You will design complex digital ICs, participate in verification flows, and engage with architects to justify trade-offs while advancing the industry’s technology leadership.