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Benefits offered by this job
Company bonus
Benefits plan
Work-life balance
Job summary
A leading design services firm in Ottawa is seeking a Senior ASIC Design Engineer with over 8 years of experience in ASIC design and complex RTL logic. In this role, you will translate system-level requirements into design specifications, develop synthesis and timing constraints, and interface with various technical teams for product integration. The position offers a competitive salary ranging from $140,000 to $190,000 plus bonuses. Join a team that values innovation and work-life balance.
Qualifications
A minimum of 8 years of relevant experience in ASIC design.
Experience with complex RTL logic design, synthesis, and timing closure.
Experience in a lab environment, troubleshooting issues at the system level.
Responsibilities
Translate system-level requirements into implementable architecture and design specifications.
Develop synthesis and timing constraints for complex block and sub-systems.
Design and implement complex RTL logic and perform lab bring-up.
Skills
ASIC design
Verilog or System Verilog
RTL logic design
Timing analysis
Troubleshooting
Team leadership
Tools
EDA tools
Scripting languages
Job description
A leading design services firm in Ottawa is seeking a Senior ASIC Design Engineer with over 8 years of experience in ASIC design and complex RTL logic. In this role, you will translate system-level requirements into design specifications, develop synthesis and timing constraints, and interface with various technical teams for product integration. The position offers a competitive salary ranging from $140,000 to $190,000 plus bonuses. Join a team that values innovation and work-life balance.