Senior Director R&D Engineering (Interface PHY / Ethernet SerDes) Synopsys

Semiengineering; Ottawa; Hybride; CAD 150 000 - 230 000; Plein temps

Résumé du poste

Synopsys is seeking a visionary leader to drive SerDes IP initiatives across distributed teams. You will align analog design, verification, and firmware to meet customer commitments while steering complex silicon bring-up challenges to resolution.

You will oversee the development of 112G and 224G Ethernet SerDes IP powering AI infrastructure and hyperscale data centers, ensuring on-time delivery and robust performance across generations.

Qualifications

• Experience leading SerDes IP teams across multiple disciplines.
• Proven ability to align analog, verification, and firmware groups.
• Strong track record in silicon bring-up and issue resolution.

Responsabilités

• Lead a team building 112G and 224G Ethernet SerDes IP powering AI infrastructure and hyperscale data centers.

Description du poste

You have spent your career building and leading teams that ship advanced SerDes IP, and you understand that execution is everything. The difference between a program that delivers and one that slips is usually a decision made six months earlier, and you are the kind of leader who sees it coming and adjusts before it becomes a crisis.

Managing distributed teams across time zones does not intimidate you. You create alignment between analog designers, verification engineers, and firmware developers while keeping customer commitments front and center. When silicon bring-up hits an unexpected issue, you are the person the team calls because you cut through noise and mobilize the right people without creating panic. At Synopsys, you will lead the team building 112G and 224G Ethernet SerDes IP that powers AI infrastructure and hyperscale data centers.