PCIe Design Verification Engineer

Advanced Micro Devices; Markham; On-site; CAD 80,000 - 130,000; Full time

Job summary

Join a forward-thinking company as a Design Verification Engineer, where your expertise will help shape the future of computing technology. In this role, you will verify cutting-edge PCIe Controller Designs, working on advanced SOCs that power AI, gaming, and more. Collaborate with talented architects and engineers to ensure high-quality verification processes, utilizing your skills in SystemVerilog and UVM. This position offers the chance to make a significant impact in a dynamic team environment, driving innovation and excellence in technology. If you're passionate about verification and eager to contribute to groundbreaking projects, this opportunity is perfect for you.

Qualifications

• Experience in verifying IPs, Subsystems, or SoCs.
• Expert in SystemVerilog and UVM with strong technical skills.

Responsibilities

• Conduct functional verification execution from test plan to signoff.
• Collaborate with architects to understand IP features.
• Lead verification flow and build testbench components.

Skills

SystemVerilog

UVM

Object-oriented programming

Scripting (Ruby, Python, Perl)

Problem-solving

Communication

Mentoring

Time management

Education

Bachelor's degree in Computer Engineering

Master's degree in Electrical Engineering

Tools

Simulation tools

HLS tools

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

THE ROLE:

AMD is looking for an experienced Design Verification Engineer willing to take on the challenge of verifying a leading edge PCIe Controller Design. In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD SOCs powering AI Training and Inference, Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team is responsible for the Verification of several critical blocks, interoperability of lower level IPs and the SubSystem delivery to SoC. The team is tasked with verifying a balanced architecture between power consumption and performance, delivering high complexity RTL code and Verification components, as well as creating advanced testbenches using leading-edge verification techniques.

THE PERSON:

A successful candidate will work with architects and fellow design and verification leads. The candidate will be highly accurate and detail-oriented, possessing strong communication, mentoring, leadership and problem-solving skills. Can work well with cross functional teams. Skilled at driving team and tasks from start to completion with superior quality. Drives to learn and perform at his or her highest potential in a technical capacity. Flexible in working hours to accommodate working with co-workers in different time-zones.

KEY RESPONSIBILITIES:

• Work on functional verification execution from test plan to verification signoff.
• Collaborate with architects and designers to understand the IP features.
• Write/Implement/Review Test Plans.
• Verification of critical high speed digital designs using both coverage driven random and directed testing techniques as well as Formal verification.
• Own some or all aspects of the Verification flow from initial test planning to coverage convergence and sign-off closure for one or more features and aspects of SubSystem level IP interoperability.
• Build testbench components and develop test and sequence libraries, by applying Objected Oriented Programming Verification techniques following UVM methodology.
• Conduct and participate in Code Reviews.
• Technical leadership, including block ownership from start to finish and verification sign-off.

PREFERRED EXPERIENCE:

• Proven experience in verifying commercially successful IPs, Subsystems and or SoCs.
• Strong ability to provide mentorship and guidance to junior and senior engineers, a very effective team player, must have strong technical skills and provide a positive influence on team morale and culture.
• Must be expert in SystemVerilog, UVM.
• Proficient in object-oriented programming, scripting (Ruby, Python, Perl), and low-level programming languages.
• PC System Architecture: PCI Express, SATA, USB, Ethernet, HyperTransport, DDR.
• Excellent knowledge of standard bus/interface protocols (i.e., AXI, AHB, AMBA, OCP, PIPE).
• Experience with simulation profiling, efficiency improvements, acceleration, HLS tools/process.
• Must be a self-starter, and able to drive independently and efficiently challenge time-critical tasks to on-time completion.
• Strong communication, time management, and presentation skills.

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in Computer or Electrical Engineering.

LOCATION:

• Markham, Vancouver.

Benefits offered are described: AMD benefits at a glance.