Sr. Staff ASIC Digital Verification Engineer (Ethernet)

Synopsys, Inc.; Mississauga; On-site; CAD 80,000 - 120,000; Full time

Job summary

An established industry player is seeking a skilled ASIC Digital Verification Engineer to join their innovative team. This role offers the opportunity to work on cutting-edge technology, focusing on VLSI IP verification and complex protocols like Ethernet. You will be responsible for architecting testbenches, debugging, and enhancing verification processes. Collaborating with global teams, you will also mentor junior engineers, ensuring high-quality deliveries and driving innovation in the verification domain. If you're passionate about technology and eager to make a significant impact, this is the perfect role for you.

Benefits

Health Benefits

Wellness Programs

Financial Benefits

Flexible Work Hours

Qualifications

• 6 to 12 years of relevant experience in verification of IP Cores or SoC designs.
• Strong skills in System Verilog coding and simulation tools.

Responsibilities

• Architecting testbenches and improving verification coverage.
• Mentoring junior engineers and driving quality improvements.

Skills

VLSI IP Verification

System Verilog

UVM/OVM Methodologies

Debugging

Problem Solving

Scripting Languages (Perl/Shell)

Mentoring

Education

BSEE/MSEE in Electrical Engineering

Tools

System Verilog

Perforce

Job description

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly skilled ASIC Digital Verification Engineer passionate about working on the forefront of technology. You have a strong background in VLSI IP verification, particularly with complex protocols such as Ethernet. Your expertise in architecting testbenches, coding, and debugging is complemented by your ability to work in a multi-site environment and mentor junior engineers. You thrive in a collaborative setting, contributing to technical reviews and quality improvements. Your problem-solving skills are exceptional, and you are adept at analyzing coverage metrics and enhancing test cases. If you have experience with System Verilog, UVM/OVM methodologies, and scripting languages like Perl/Shell, you are exactly who we are looking for.

What You’ll Be Doing:

• Understanding standard specifications and creating micro-architecture and detailed design for components of the Test Environment for the DesignWare family of synthesizable cores in various protocol areas.
• Contributing as an individual in verification tasks including architecting testbenches, coding, debugging, and improving verification coverage.
• Participating in technical reviews of medium complexity Test Environment code.
• Driving technical process and quality improvements to ensure high-quality deliveries.
• Solving complex and abstract problems within the verification domain.
• Analyzing coverage metrics and enhancing test cases in a Constrained Random Verification (CRV) environment.
• Collaborating with global teams and possibly taking on a technical lead role for certain Test Environment components.
• Mentoring junior engineers and interns to develop their skills and leadership abilities.

The Impact You Will Have:

• Enhancing the quality and reliability of our silicon IP products.
• Driving innovation and efficiency in the verification process.
• Contributing to the timely delivery of high-performance IP cores.
• Improving the overall design and functionality of complex protocols.
• Supporting the integration of more capabilities into SoCs faster.
• Reducing risks and accelerating time-to-market for differentiated products.

What You’ll Need:

• BSEE/MSEE in Electrical Engineering with 6 to 12 years of relevant experience.
• Experience in verification of IP Cores or SoC designs for various applications.
• Knowledge of protocols such as Ethernet, AMBA, SD/eMMC, USB, DDR, PCIe, MIPI, and DSC.
• Proficiency in creating detailed design of Test Environment components using methodologies like UVM/OVM.
• Strong skills in System Verilog coding and simulation tools, with deep knowledge of OOP concepts.
• Experience with version control environments like Perforce.
• Knowledge of scripting languages such as Perl or Shell.
• Exposure to quality processes in IP design and verification.

Who You Are:

• An excellent communicator and team player.
• A problem solver with strong analytical skills.
• A mentor who can guide junior engineers and interns.
• A detail-oriented individual focused on quality and process improvement.
• A self-starter who can work with limited supervision and handle complex issues.

The Team You’ll Be A Part Of:

You will be part of the Solutions Group at our Bangalore Design Center, working in a dynamic and collaborative environment. Our team focuses on the verification of IP cores for various protocols, contributing to the development of advanced technology solutions. We value innovation, quality, and teamwork, and we are committed to supporting each team member's growth and development.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.