Lead High-Speed Analog Layout Engineer (BiCMOS)

Ciena; Ottawa; On-site; CAD 114,000 - 182,000; Full time

Job summary

Ciena, the global leader in high-speed connectivity, seeks an experienced analog layout engineer in Ottawa, Canada. You will lead block and macro layout, perform feasibility studies across topologies, and ensure reliability with physical verification.

The role emphasizes collaboration with analog designers, mentoring junior engineers, and delivering high-performance BiCMOS/CMOS layouts for next-generation optical modem solutions.

Qualifications

• Bachelor's degree in Engineering, Science, Computer Science or related field.
• Experience in leading analog high-speed layout in BiCMOS/CMOS.
• Able to work independently and in teams, methodical problem solving.
• Excellent written and spoken English.

Responsibilities

• Lead block and macro layout development including floor planning and optimization.
• Evaluate layout feasibility across circuit topologies with analog designers.
• Perform physical verification and electromigration checks.
• Collaborate and share knowledge within the team.
• Mentor junior layout engineers.

Skills

Analog Layout

BiCMOS/CMOS

Independent Work

Team Collaboration

English Communication

Education

Bachelor of Engineering/Science/CS or equivalent

Tools

Cadence

Mentor

Synopsys

Virtuoso

Calibre PERC

PEX

Job description

Ciena, the global leader in high-speed connectivity, seeks an experienced analog layout engineer in Ottawa, Canada. You will lead block and macro layout, perform feasibility studies across topologies, and ensure reliability with physical verification.

The role emphasizes collaboration with analog designers, mentoring junior engineers, and delivering high-performance BiCMOS/CMOS layouts for next-generation optical modem solutions.