IOMMU Verification Engineer for ASIC – Hybrid

Advanced Micro Devices

Vancouver

Hybrid

CAD 120,000 - 170,000

Full time

2 days ago
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Benefits offered by this job

Hybrid work model
Comprehensive benefits

Job summary

Advanced Micro Devices (AMD) is seeking an ASIC Design Verification Engineer to join the NBIO team in Vancouver. You will contribute to verification architecture, test plans, and end-to-end verification of IP blocks across client/server/embedded and graphics chips.

You will develop verification environments using SystemVerilog, UVM, and SVA, create test cases, triage regressions, and collaborate with IP architects to deliver high-quality silicon on schedule. Hybrid work in Vancouver is available.

Qualifications

  • Analytical thinking and problem-solving skills.
  • Strong teamwork and communication abilities.
  • Self-starter who can drive tasks to completion.
  • Comfortable in a fast-paced, multi-project environment with modern tools.
  • Solid ASIC verification experience is required.
  • Good understanding of digital design and computer architecture.
  • Proficient in Verilog, SystemVerilog, SVA, C/C++, UVM, OOP and Linux/Windows.

Responsibilities

  • Collaborate with IP architects to develop verification architecture and plans.
  • Verify complex IP blocks and own key features across projects.
  • Develop test plans, verification environments, regression suites and coverage closure.
  • Create and maintain VIPs, libraries and testcases (random and directed) using SystemVerilog/UVM.
  • Triaging and debugging regressions.
  • Analyze code and functional coverage.
  • Apply industry-leading verification methodologies such as UVM and formal verification.
  • Reproduce functional bugs in post-silicon simulation or formal environments.
  • Participate in code reviews.
  • Develop and maintain scripts/tools to improve engineering infrastructure and execution.

Skills

Analytical thinking
Teamwork
Self-starter
Continuous improvement
ASIC verification
Digital design understanding
Verilog
SystemVerilog
SVA
C/C++
UVM
OOP
Linux/Windows

Education

BS/MS degree in Engineering (Electrical, Electronics, Computer) or Computer Science

Job description

Advanced Micro Devices (AMD) is seeking an ASIC Design Verification Engineer to join the NBIO team in Vancouver. You will contribute to verification architecture, test plans, and end-to-end verification of IP blocks across client/server/embedded and graphics chips.

You will develop verification environments using SystemVerilog, UVM, and SVA, create test cases, triage regressions, and collaborate with IP architects to deliver high-quality silicon on schedule. Hybrid work in Vancouver is available.

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