DSP - FEC Design Engineer

Celero Communications, Inc.

Vancouver

On-site

CAD 209,731 - 349,552

Full time

14 days+

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Job summary

Celero Communications, Inc. is seeking a DSP - FEC Design Engineer to develop high-performance FEC algorithms for next-gen optical modems. The successful candidate will have a strong theoretical background in coding theory and digital communications.

You will research and optimize FEC schemes while collaborating with various engineering teams to ensure successful delivery. This position offers a competitive salary range of $150,000 - $250,000 based on skills and experience.

Qualifications

  • Master's or Ph.D. degree in Electrical Engineering, Mathematics, Computer Engineering, or related field.
  • Strong background in coding theory and error correction algorithms.
  • Experience with FEC schemes for communication systems.
  • Programming experience in C/C++, Python, MATLAB, or similar languages.
  • Team player with focus on product delivery.

Responsibilities

  • Research and develop FEC schemes for high-speed optical communication.
  • Design and optimize FEC algorithms for optical modem implementations.
  • Collaborate with DSP, ASIC, and verification teams.
  • Document algorithm design and simulation results.

Skills

Coding theory
Digital communications
Error correction techniques
C/C++ programming
Python
MATLAB
DSP algorithms
Version control (GitHub)

Education

Master's or Ph.D. in Electrical Engineering or related field

Tools

MATLAB
Verilog
VHDL

Job description

DSP - FEC Design Engineer

Locations: Ottawa, Ontario, Canada or Vancouver, British Columbia, Canada

Celero Communications Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing boundaries with innovative technologies that power the world’s most advanced AI and data center infrastructure. We are looking for skilled and motivated engineers to join our team and help us build optical transceivers for next-generation optical modems. The ideal candidate must have a strong theoretical background in coding theory, digital communications, and error correction techniques, with experience developing high-performance forward error correction (FEC) algorithms for high-speed communication systems. Candidates with industry experience are preferred.

Key Responsibilities
  • Research, develop, and evaluate forward error correction (FEC) schemes for high-speed optical communication systems.
  • Design and optimize soft-decision FEC algorithms suitable for high-throughput optical modem implementations.
  • Develop and evaluate coding schemes such as LDPC, staircase codes, or related high-performance FEC architectures.
  • Model and simulate FEC performance in optical communication systems, including interaction with DSP blocks and channel impairments.
  • Analyze performance trade-offs including coding gain, latency, throughput, and implementation complexity.
  • Develop floating-point and fixed-point simulation models for algorithm verification.
  • Implement bit-accurate and cycle-accurate models supporting ASIC implementation.
  • Collaborate closely with DSP, ASIC, firmware, and verification teams to ensure efficient hardware implementation.
  • Document algorithm design and simulation results.
Preferred Qualifications
  • Master’s or Ph.D. degree in Electrical Engineering, Mathematics, Computer Engineering, or related field.
  • Strong background in coding theory and error correction algorithms.
  • Experience with FEC schemes for communication systems, particularly soft-decision FEC.
  • Familiarity with LDPC, staircase codes, product codes, or related modern FEC techniques.
  • Experience evaluating coding gain, BER performance, and decoder complexity.
  • Programming experience in C/C++, Python, MATLAB, or similar languages.
  • Experience in modeling communication systems.
  • Familiarity with DSP algorithms for communication systems.
  • Experience with version control systems, specifically GitHub.
  • Familiarity with hardware implementation considerations and languages such as Verilog or VHDL is a plus.
  • Team player with a mindset focused on the successful delivery of the first product.

Annual Base Salary Range: $150,000 - $250,000 (The final offer will be determined based on job-related skills, experience, qualifications, and location.)

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